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參數(shù)資料
| 型號(hào)： | MB90F583B |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁(yè)數(shù)： | 53/124頁(yè) |
| 文件大?。?/td> | 2638K |
| 代理商： | MB90F583B |
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MB90580B Series
53
9.
8/16-bit PPG
8/16-bit PPG is an 8/16-bit reload timer module. The block performs PPG output in which the pulse output is
controlled by the operation of the timer.
The hardware consists of two 8-bit down-counters, four 8-bit reload registers, one 16-bit control register, two
external pulse output pins, and two interrupt outputs. The PPG has the following functions.
8-bit PPG output in two channels independent operation mode:
Two independent PPG output channels are available.
16-bit PPG output operation mode :
One 16-bit PPG output channel is available.
8 + 8-bit PPG output operation mode :
Variable-period 8-bit PPG output operation is available by using the output of channel 0 as the clock input to
channel 1.
PPG output operation :
Outputs pulse waveforms with variable period and duty ratio. Can be used as a D/A converter in conjunction
with an external circuit.
(1) Register configuration
PPG0 operating mode control register
bit
7
6
5
4
3
2
1
0
Address
: ch0 0000044
H
PEN0
(R/W) (
) (R/W) (R/W) (R/W) (
) (
) (R/W)
(0) (
) (0)
(0)
POE0 PIE0 PUF0
Re-
served
PPGC0
Access
Initial value
(0)
(X)
(X)
(1)
PPG1 operating mode control register
bit
15
14
13
12
11
10
9
8
Address
: ch1 0000045
H
PEN1
(R/W) (
) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(0) (
) (0)
(0)
POE1 PIE1 PUF1 MD1 MD0
Re-
served
PPGC1
Access
Initial value
(0)
(0)
(0)
(1)
PPG0 and 1 output control registers
bit
7
6
5
4
3
2
1
0
Address
: ch0, 1 0000046
H
PCS2 PCS1 PCS0PCM2PCM1PCM0
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(0)
(0)
(0)
(0)
Re-
served
Re-
served
PPGOE
Access
Initial value
(0)
(0)
(0)
(0)
Reload register H
bit
15
14
13
12
11
10
9
8
Address
: ch0 000041
H
: ch1 000043
H
PRLH0
PRLH1
Access
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X)
(X)
(X)
(X)
Initial value
(X)
(X)
(X)
(X)
Reload register L
bit
7
6
5
4
3
2
1
0
Address
: ch0 000040
H
: ch1 000042
H
PRLL0
PRLL1
Access
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X)
(X)
(X)
(X)
Initial value
(X)
(X)
(X)
(X)
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