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參數(shù)資料
| 型號(hào)： | MB90F568PMC |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁(yè)數(shù)： | 3/92頁(yè) |
| 文件大?。?/td> | 2097K |
| 代理商： | MB90F568PMC |
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MB90560/565 Series
DS07-13715-5E
11
(Continued)
Pin No.
Pin
Name
Circuit
Type*1
State/
Function
at Reset
Description
QFP*3
LQFP*4
SDIP*5
51 to 56
50 to 55
58 to 63
P30 to
P35
E
Port
inputs
(Hi-Z)
I/O ports
RTO0
to
RTO5
Event output pins for the output compare and
waveform generator output pins. The pins output
the specified waveform generated by the waveform
generator. If not using waveform generation, these
terminals enable output compare event output to
use as output compare outputs. When used as a
port, set the corresponding bits in the analog input
enable register (ADER) to “port”.
59
58
2
P36
D
I/O port
SIN0
Serial data input pin for UART ch0.
This pin is used continuously when input operation
is enabled for UART ch0. In this case, do not use
as a general input pin.
60
59
3
P37
D
I/O port
SOT0
Serial data output pin for UART ch0.
Output operates when UART ch0 output is en-
abled.
61
60
4
P40
D
I/O port
SCK0
Serial clock I/O pin for UART ch0.
Output operates when UART ch0 clock output is
enabled.
62 to 64,
1 to 3
61 to 64,
1, 2
5 to 10
P41 to
P46
D
I/O ports
PPG0
to
PPG5
Output pins for PPG ch0 to ch5.
The outputs operate when output is enabled for
PPG ch0 to ch5.
4 to 11
3 to 10
11 to 18
P50 to
P57
F
Analog
inputs
I/O ports
AN0 to
AN7
Analog input pins for the A/D converter. Input is
available when the corresponding analog input en-
able register bits are set. (ADER : bit0 to bit7)
12
11
19
AVCC
Power
supply
input
VCC power supply input pin for A/D converter.
13
12
20
AVR
G
Refer-
ence volt-
age input
Reference voltage input pin for A/D converter.
Ensure that the voltage does not exceed VCC.
14
13
21
AVSS
Power
supply
input
VSS power supply input pin for A/D converter.
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