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參數(shù)資料
| 型號(hào)： | MB90F549G |
| 廠商： | Fujitsu Limited |
| 英文描述： | Octal Bus Transceivers And Registers With 3-State Outputs 24-CDIP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁(yè)數(shù)： | 3/56頁(yè) |
| 文件大小： | 757K |
| 代理商： | MB90F549G |
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MB90540/545 Series
3
(Continued)
UART 1
With full-duplex double buffer (8-bit length)
Clock asynchronized or clock synchronized serial (extended I/O serial) can be used.
External interrupt circuit (8 channels)
A module for starting an extended intelligent I/O service (EI
2
OS) and generating an external interrupt which
is triggered by an external input.
Delayed interrupt generation module
Generates an interrupt request for switching tasks.
8/10-bit A/D converter (8 channels)
8/10-bit resolution can be selectively used.
Starting by an external trigger input.
Conversion time: 26.3
μ
s
FULL-CAN interfaces
MB90540 series: 2 channel
MB90545 series: 1 channel
Conforming to Version 2.0 Part A and Part B
Flexible message buffering (mailbox and FIFO buffering can be mixed)
External bus interface: Maximum address space 16 Mbytes
*: Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB90F549PF | 16-bit Proprietary Microcontroller |
| MB90F549PFV | 16-bit Proprietary Microcontroller |
| MB90F553A | Octal Bus Transceivers And Registers With 3-State Outputs 24-CFP -55 to 125 |
| MB90T552A | 122 x 32 pixel format, Compact LCD size |
| MB90T552APF | 122 x 32 pixel format, Compact LCD size |
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參數(shù)描述 |
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| MB90F562BPMC-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F562PMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F568PMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F583BPFR-GE1 | 制造商:FUJITSU 功能描述: |
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