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參數(shù)資料
| 型號： | MB90F549G |
| 廠商： | Fujitsu Limited |
| 英文描述： | Octal Bus Transceivers And Registers With 3-State Outputs 24-CDIP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 25/56頁 |
| 文件大?。?/td> | 757K |
| 代理商： | MB90F549G |
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MB90540/545 Series
25
(Continued)
Address
Note
Initial value of “_” represents unused bit, “X” represents unknown value.
Addresses in the range 0000
H
to 00FF
H
, which are not listed in the table, are reserved for the primary functions
of the MCU. A read access to these reserved addresses results in an “X” reading and any write access
should not be performed.
Register
Abbreviation Access
Peripheral
Initial value
3928
H
Output Compare 0
OCCP0
R/W
Output Compare 0/1
XXXXXXXX
B
3929
H
Output Compare 0
OCCP0
R/W
XXXXXXXX
B
392A
H
Output Compare 1
OCCP1
R/W
XXXXXXXX
B
392B
H
Output Compare 1
OCCP1
R/W
XXXXXXXX
B
392C
H
Output Compare 2
OCCP2
R/W
Output Compare 2/3
XXXXXXXX
B
392D
H
Output Compare 2
OCCP2
R/W
XXXXXXXX
B
392E
H
Output Compare 3
OCCP3
R/W
XXXXXXXX
B
392F
H
Output Compare 3
OCCP3
R/W
XXXXXXXX
B
3930
H
to
39FF
H
Reserved
3A00
H
to
3AFF
H
Reserved for CAN 0 Interface. Refer to “CAN Controller Hardware Manual”
3B00
H
to
3BFF
H
Reserved for CAN 0 Interface. Refer to “CAN Controller Hardware Manual”
3C00
H
to
3CFF
H
Reserved for CAN 1 Interface. Refer to “CAN Controller Hardware Manual”
3D00
H
to
3DFF
H
Reserved for CAN 1 Interface. Refer to “CAN Controller Hardware Manual”
3E00
H
to
3FFF
H
Reserved
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