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參數(shù)資料
| 型號： | MB90F462PFM |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125 |
| 中文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 48/85頁 |
| 文件大?。?/td> | 827K |
| 代理商： | MB90F462PFM |
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MB90460 Series
48
8.
Multi-Pulse Generator
The Multi-pulse Generator consists of a 16-bit PPG timer, a 16-bit reload timer and a waveform sequencer. By
using the waveform sequencer, 16-bit PPG timer output signal can be directed to Multi-pulse Generator output
(OPT5 to 0) according to the input signal of Multi-pulse Generator (SNI2 to 0) . Meanwhile, the OPT5 to 0 output
signal can be hardware terminated by DTTI input (DTTI1) in case of emergency. The OPT5 to 0 output signals
are synchronized with the PPG signal in order to eliminate the unwanted glitch.
The Multi-pulse generator has the following features :
Output Signal Control
- 12 output data buffer registers are provided
- Output data register can be updated by any one of output data buffer registers when :
1. an effective edge detected at SNI2 - SNI0 pin
2. 16-bit reload timer underflow
3. output data buffer register OPDBR0 is written
Output data register (OPDR) determines which OPT terminals (OPT5 - 0) output the 16-bit PPG waveform
- Waveform sequencer is provided with a 16-bit timer to measure the speed of motor
- The 16-bit timer can be used to disable the OPT output when the position detection is missing
Input Position Detect Control
- SNI2 - SNI0 input can be used to detect the rotor position
- A controllable noise filter is provided to the SNI2 - SNI0 input
PPG Synchronization for Output signal
- OPT output is able to synchronize the edge of PPG waveform to avoid a short pulse (or glitch) appearance
Vaious interrupt generation causes
EI
2
OS supported
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