MB90420G/5G (A) Series
91
Table 19
Branch 1 Instructions [31 Instructions]
*1: 4 when branching, 3 when not branching.
*2: (b) + 3
× (c)
*3: Read (word) branch address.
*4: W: Save (word) to stack; R: read (word) branch address.
*5: Save (word) to stack.
*6: W: Save (long word) to W stack; R: read (long word) R branch address.
*7: Save (long word) to stack.
Note : For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
RG
BOperation
LH
AH
I
S
T
N
Z
V
C
RMW
BZ/BEQ
rel
BNZ/BNE
rel
BC/BLO
rel
BNC/BHS
rel
BN
rel
BP
rel
BV
rel
BNV
rel
BT
rel
BNT
rel
BLT
rel
BGE
rel
BLE
rel
BGT
rel
BLS
rel
BHI
rel
BRA
rel
JMP
@A
JMP
addr16
JMP
@ear
JMP
@eam
JMPP
@ear *3
JMPP
@eam *3
JMPP
addr24
CALL
@ear *4
CALL
@eam *4
CALL
addr16 *5
CALLV #vct4 *5
CALLP @ear *6
CALLP @eam *6
CALLP addr24 *7
2
1
3
2
2+
2
2+
4
2
2+
3
1
2
2+
4
*1
2
3
4+ (a)
5
6+ (a)
4
6
7+ (a)
6
7
10
11+ (a)
10
0
1
0
2
0
1
0
2
0
(c)
0
(d)
0
(c)
2
× (c)
(c)
2
× (c)
2
× (c)
*2
2
× (c)
Branch when (Z) = 1
Branch when (Z) = 0
Branch when (C) = 1
Branch when (C) = 0
Branch when (N) = 1
Branch when (N) = 0
Branch when (V) = 1
Branch when (V) = 0
Branch when (T) = 1
Branch when (T) = 0
Branch when (V) xor (N) = 1
Branch when (V) xor (N) = 0
Branch when ((V) xor (N)) or (Z) = 1
Branch when ((V) xor (N)) or (Z) = 0
Branch when (C) or (Z) = 1
Branch when (C) or (Z) = 0
Branch unconditionally
word (PC)
← (A)
word (PC)
← addr16
word (PC)
← (ear)
word (PC)
← (eam)
word (PC)
← (ear), (PCB) ← (ear +2)
word (PC)
← (eam), (PCB) ← (eam +2)
word (PC)
← ad24 0 to 15,
(PCB)
← ad24 16 to 23
word (PC)
← (ear)
word (PC)
← (eam)
word (PC)
← addr16
Vector call instruction
word (PC)
← (ear) 0 to 15,
(PCB)
← (ear) 16 to 23
word (PC)
← (eam) 0 to 15,
(PCB)
← (eam) 16 to 23
word (PC)
← addr0 to 15,
(PCB)
← addr16 to 23
–