
MB90390 Series
3
I
PRODUCT LINEUP
(Continued)
Part Number
Parameter
MB90F394H
MB90V390H
CPU
F
2
MC-16LX CPU
System clock
On-chip PLL clock multiplier (
×
1,
×
2,
×
3,
×
4,
×
6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz osc. PLL
×
6)
Boot-block
Flash memory 384K bytes
Hard-wired reset vector
ROM
External
RAM
10K bytes
16K bytes
Emulator-specific
power supply*
1
Yes
Technology
0.35
μ
m CMOS with on-chip voltage
regulator for internal power supply
+
Flash
memory with
On-chip charge pump for programming
voltage
0.35
μ
m CMOS with on-chip voltage
regulator for internal power supply
Operating
voltage range
3.5 V to 5.5 V
(4.5 V to 5.5 V if A/D Converter is used)
40
°
C to
+
85
°
C
LQFP-120
5 V
±
10
%
Temperature range
Package
PGA-299
UART
2 channels
3 channels
Full duplex double buffer
Supports asynchronous/synchronous (with start/stop bit) transfer
Baud rate : 4808/9615/10417/19230/38460/62500/500000 bps (asynchronous)
500 K/1 M/2 Mbps (synchronous) at System clock
=
24 MHz
UART
(SCI)
1 channel
1 channel
I
2
C (400 Kbps)
1 channel
Serial I/O
Transfer can be started from MSB or LSB
Supports internal clock synchronized transfer and external clock synchronized transfer
Supports positive-edge and negative-edge clock synchronization
Baud rate : 31.25 K/62.5 K/125 K/500 K/1 Mbps at System clock
=
24 MHz
8 input channels
A/D
Converter
15 input channels
10-bit or 8-bit resolution
Conversion time : Min 4.9
μ
s include sample time (per one channel)
Operation clock frequency : fsys/2
1
, fsys/2
3
, fsys/2
5
(fsys
=
System clock frequency)
Supports External Event Count function
16-bit Reload Timer
(2 channels)
Watch Timer
Directly operates with the oscillation clock
Facility to correct oscillation deviation
Read/Write accessible Second/Minute/Hour registers
Signals interrupts