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參數(shù)資料
| 型號(hào)： | MB90F377PFF-G |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 0.40 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁(yè)數(shù)： | 39/140頁(yè) |
| 文件大?。?/td> | 650K |
| 代理商： | MB90F377PFF-G |
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MB90370/375 Series
39
I
PERIPHERAL RESOURCES
1.
Low-power Consumption Control Circuit
The MB90370/375 series has the following CPU operating mode selected by the configuration of an operating
clock and clock operation control.
Clock Mode
PLL clock mode
In this mode, a PLL clock that is a multiple of the oscillation clock (HCLK) is used to operate the CPU and
peripheral functions.
Main clock mode
In this mode, the main clock, with the oscillation clock (HCLK) frequency divided by 2 is used to operate
the CPU and peripheral functions. In the main clock mode, the PLL multiplier circuit is inactive.
Sub-clock mode
In this mode, the sub-clock, with the sub-clock (SCLK) frequency divided by 4 is used to operate the CPU
and peripheral functions. In the sub-clock mode, the main clock and PLL multiplier circuit are inactive.
CPU Intermittent Operating Mode
In this mode, the CPU is operated intermittently while high-speed clock pluses are supplied to peripheral func-
tions, thereby reducing power consumption. In this mode, intermittent clock pulses are supplied only to the CPU
while it is accessing a register, internal memory, or peripheral function.
Standby Mode
In this mode, the low-power consumption control circuit stops supplying the clock to the CPU (sleep mode) or
the CPU and peripheral functions (timebase timer mode) or stops the oscillation clock itself (stop mode) , thereby
reducing power consumption.
PLL sleep mode
The PLL sleep mode is activated to stop the CPU operating clock in the PLL clock mode. Components
excluding the CPU operate on the PLL clock.
Main sleep mode
The main sleep mode is activated to stop the CPU operating clock in the main clock mode. Components
excluding the CPU operate on the main clock.
Sub-sleep mode
The sub-sleep mode is activated to stop the CPU operating clock in the sub-clock mode. Components
excluding the CPU operate on the divided-by-four sub-clock.
Timebase timer mode
The timebase timer mode causes the operation of functions, excluding the oscillation clock, timebase timer,
and watch timer, to stop. All functions other than the timebase timer and watch timer are inactivated.
Watch mode and main watch mode
The watch mode and main watch mode operates the watch timer only. The sub-clock operates but the
main clock and PLL multiplier circuit stop.
Stop mode
The stop mode causes the oscillation to stop. All functions are inactivated.
Note : Because the stop mode turns the oscillation clock off, data can be retained by the lowest power consumption.
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| MB90F378 | 16-bit Proprietary Microcontroller |
| MB90F378PFF-GE1 | 16-bit Proprietary Microcontroller |
| MB90F387 | 16-bit Proprietary Microcontroller CMOS |
| MB90F387PMT | 16-bit Proprietary Microcontroller CMOS |
| MB90F387S | 16-bit Proprietary Microcontroller CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
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| MB90F387PMCR-GSE1 | 制造商:FUJITSU 功能描述: |
| MB90F387PMT-GSE1 | 功能描述:IC MCU FLASH 64K ROM 48LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:F²MC MB90385 產(chǎn)品培訓(xùn)模塊:MCU Product Line Introduction XMEGA Introduction AVR XMEGA USB Connectivity 標(biāo)準(zhǔn)包裝:90 系列:AVR® XMEGA 核心處理器:AVR 芯體尺寸:8/16-位 速度:32MHz 連通性:I²C，IrDA，SPI，UART/USART 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，DMA，POR，PWM，WDT 輸入/輸出數(shù):50 程序存儲(chǔ)器容量:192KB（96K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:16K x 8 電壓 - 電源 (Vcc/Vdd):1.6 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 16x12b; D/A 2x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:64-TQFP 包裝:托盤(pán) 配用:ATSTK600-RC14-ND - STK600 SOCKET/ADAPTER 64TQFPATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMRATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM |
| MB90F387SPMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F387SPMCR-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB90F387SPMCRGSE1 | 制造商:FUJITSU 功能描述:Pb Free |
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