參數(shù)資料
型號(hào)： MB90F352SPFV
廠(chǎng)商： FUJITSU LTD
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP64
封裝： PLASTIC, LQFP-64
文件頁(yè)數(shù)： 51/64頁(yè)
文件大小： 800K
代理商： MB90F352SPFV
MB90350 Series
55
(8) UART 2/3
(TA = –40
°C to +105°C, VCC = 5.0 V±10 %, fCP ≤ 24 MHz, VSS = 0.0 V)
(TA = –40
°C to +125°C, VCC = 5.0 V±10 %, fCP ≤ 16 MHz, VSS = 0.0 V)
* : Refer to “ (1) Clock timing” rating for tCP (internal operating clock cycle time).
Notes :
AC characteristic in CLK synchronized mode.
CL is load capacity value of pins when testing.
tCP is the machine cycle (Unit : ns)
Parameter
Symbol
Pin
Condition
Value
Unit Remarks
Min
Max
Serial clock cycle time
tSCYC
SCK2, SCK3
Internal clock
operation output
pins are
CL
= 80 pF + 1 TTL
8 tCP*
ns
SCK
↓ → SOT delay time
tSLOV
SCK2, SCK3,
SOT2, SOT3
80
+80
ns
Valid SIN
→ SCK ↑
tIVSH
SCK2, SCK3,
SIN0 to SIN4
100
ns
SCK
↑ → Valid SIN hold time
tSHIX
SCK2, SCK3,
SIN2, SIN3
60
ns
Serial clock “H” pulse width
tSHSL
SCK2, SCK3
External clock
operation output
pins are
CL
= 80 pF + 1 TTL
4 tCP*
ns
Serial clock “L” pulse width
tSLSH
SCK2, SCK3
4 tCP*
ns
SCK
↓ → SOT delay time
tSLOV
SCK2, SCK3,
SOT2, SOT3
150
ns
Valid SIN
→ SCK ↑
tIVSH
SCK2, SCK3,
SIN2, SIN3
60
ns
SCK
↑ → Valid SIN hold time
tSHIX
SCK2, SCK3,
SIN2, SIN3
60
ns
Internal Shift Clock Mode
SCK
2.4 V
tSCYC
0.8 V
SOT
0.8 V
2.4 V
0.8 V
tSLOV
SIN
VIL
VIH
tIVSH
VIL
VIH
tSHIX
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