MB90340 Series
23
s HANDLING DEVICES
Special care is required for the following when handling the device :
Preventing latch-up
Treatment of unused pins
Using external clock
Precautions for when not using a sub clock signal
Notes on during operation of PLL clock mode
Power supply pins (VCC/VSS)
Pull-up/down resistors
Crystal Oscillator Circuit
Turning-on Sequence of Power Supply to A/D Converter and Analog Inputs
Connection of Unused Pins of A/D Converter
Notes on Energization
Stabilization of power supply voltage
Initialization
Port0 to port3 output during Power-on
(External-bus mode)
Notes on using CAN Function
Flash security Function
1.
Preventing latch-up
CMOS IC chips may suffer latch-up under the following conditions :
A voltage higher than VCC or lower than VSS is applied to an input or output pin.
A voltage higher than the rated voltage is applied between VCC and VSS.
The AVCC power supply is applied before the VCC voltage.
Latch-up may increase the power supply current drastically, causing thermal damage to the device.
For the same reason, also be careful not to let the analog power-supply voltage (AVCC, AVRH) exceed the digital
power-supply voltage.
2.
Handling unused pins
Leaving unused input pins open may result in misbehavior or latch up and possible permanent damage of the
device. Therefore they must be pulled up or pulled down through resistors. In this case those resistors should
be more than 2 k
.
Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above
described connection.
3.
Using external clock
To use external clock, drive the X0 pin and leave X1 pin open.
4.
Precautions for when not using a sub clock signal
If you do not connect pins X0A and X1A to an oscillator, use pull-down handling on the X0A pin, and leave the
X1A pin open.
X0
X1
MB90340 Series
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