參數(shù)資料
型號(hào): MB90F334APFF
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
封裝: 14 X 14 MM, 1.70 MM HEIGHT, 0.40 MM PITCH, PLASTIC, LFQFP-120
文件頁(yè)數(shù): 91/120頁(yè)
文件大小: 1210K
代理商: MB90F334APFF
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)當(dāng)前第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)
MB90330A Series
72
13. DTP/External interrupt circuit
DTP (Data Transfer Peripheral)/External interrupt circuit detects the interrupt request input from the external
interrupt input terminal (INT7 to INT0) , and outputs the interrupt request.
DTP/External interrupt circuit function
The DTP/External interrupt function outputs an interrupt request upon detection of the edge or level signal input
to the external interrupt input pins (INT7 to INT0).
If CPU accepts the interrupt request, and if the extended intelligent I/O service (EI2OS) is enabled, branches to
the interrupt handling routine after completing the automatic data transfer (DTP function) performed by EI2OS.
And if EI2OS is disabled, it branches to the interrupt handling routine without activating the automatic data transfer
(DTP function) performed by EI2OS.
Overview of DTP/External interrupt circuit
External interrupt
DTP function
Input pin
8 channels (P60/INT0, P61/INT1, P62/INT2/SIN, P63/INT3/SOT, P64/INT4/SCK,
P65/INT5/PWC, P66/INT6/SCL0, P67/INT7/SDA0)
Interrupt source
The detection level or the type of the edge for each terminal can be set in the
request level setting register (ELVR).
Input of H level/L level/rising edge/falling edge.
Interrupt number
#18 (12H), #20 (14H), #22 (16H), #24 (18H)
Interrupt control
Enabling/disabling the interrupt request output using the DTP/interrupt enable
register (ENIR)
Interrupt flag
Holding the interrupt causes using the DTP/interrupt cause register (EIRR)
Process setting
Disable EI2OS (ICR: ISE=“0”)
Enable EI2OS (ICR: ISE=“1”)
Process
Branched to the interrupt handling
routine
After an automatic data transfer by
EI2OS, branched to the interrupt
handling routine
相關(guān)PDF資料
PDF描述
MB90F334APMC 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
MB90333APMC 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP120
MB90F334APMC1 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
MB90F395HAPMT 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
MB90F428GBPFV 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB90F334APMC1-GE1 制造商:FUJITSU 功能描述:
MB90F334APMC1-G-SPE1 制造商:FUJITSU 功能描述:
MB90F334APMC-G-JNE1 制造商:FUJITSU 功能描述:
MB90F334APMC-G-SNE1 制造商:FUJITSU 功能描述:
MB90F334APMC-G-SPE1 制造商:FUJITSU 功能描述: