
MB90925 Series
56
Notes of the external impedance of the analog input and its sampling time
A/D converter with sample and hold circuit. If the external impedance is too high to keep sufficient sampling
time, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting
A/D conversion precision. Therefore, to satisfy the A/D conversion precision standard, consider the relationship
between the external impedance and minimum sampling time and either adjust the register value and operating
frequency or decrease the external impedance so that the sampling time is longer than the minimum value. Also,
if the sampling time cannot be sufficient, connect a capacitor of about 0.1
μ
F to the analog input pin.
R
Comp
a
r
a
tor
C
Analog input
Analog input equivalent circuit
During sampling : ON
Note : The values are reference values.
MB90F927/MB90F927S
R C
4.5 V
≤
AVcc
≤
5.5 V : 2.0 k
(Max) 16.0 pF (Max)
4.0 V
≤
AVcc
≤
4.5 V : 8.2 k
(Max) 16.0 pF (Max)
MB90V925-101/102
4.5 V
≤
AVcc
≤
5.5 V : 2.0 k
(Max) 14.4 pF (Max)
4.0 V
≤
AVcc
≤
4.5 V : 8.2 k
(Max) 14.4 pF (Max)