參數(shù)資料
型號(hào): MB90673
廠商: Fujitsu Limited
英文描述: 16-Bit Proprietary Microcontroller(16位專用微控制器)
中文描述: 16位微控制器專利(16位專用微控制器)
文件頁(yè)數(shù): 44/111頁(yè)
文件大?。?/td> 736K
代理商: MB90673
MB90670/675 Series
44
4. 10-bit 8-channel A/D Converter (with 8-bit Resolution Mode)
The 10-bit 8-channel A/D converter converts analog input voltage into a digital value. The features of this module
are as follows:
Conversion time: Minimum of 6.13
μ
s per channel (98 machine cycles/16 MHz machine clock, including
sampling time)
Sampling time: Minimum of 3.75
μ
s per channel (60 machine cycles/16 MHz machine clock)
RC-type successive approximation conversion method with sample and hold circuit
10-bit/8-bit resolution
Analog input is selectable by software from among 8 channels
Single-conversion mode: Selects and converts one channel.
Scan conversion mode: Converts several consecutive channels (up to eight channels can be programmed).
Continuous conversion mode: Repeatedly converts the specified channel.
Stop conversion mode: Pauses after converting one channel and waits until the next activation (permits
synchronization of start of conversion).
When A/D conversion is completed, an “A/D conversion complete” interrupt request can be issued to the CPU.
Because generating this interrupt can be used to activate the I
2
OS and transfer the A/D conversion results to
memory, this function is suitable for continuous processing.
Activation sources can be selected from among software, an external trigger (falling edge), and 16-bit reload
timer 1 (rising edge).
(1) Register Configuration
BUSY
INT
INTE PAUS STS1 STS0 STRT
Reserved
ADCS
A/D converter control status register upper
Address : 00002D
H
A/D converter control status register lower
Address : 00002C
H
A/D converter data register lower
Address : 00002E
H
A/D converter data register upper
Address : 00002F
H
MD1
MD0 ANS2 ANS1 ANS0 ANE2 ANE1 ANE0
S10
D9
D8
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
D7
D6
D5
D4
D3
D2
D1
D0
Bit no.
ADCS
Bit no.
ADCR
Bit no.
ADCR
Bit no.
15
14
13
12
11
10
9
8
Read/write
Initial value
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(W)
(0)
(—)
(0)
Read/write
Initial value
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
Read/write
Initial value
(R/W)
(0)
(R)
(0)
(R)
(0)
(R)
(0)
(R)
(0)
(R)
(0)
(R)
(X)
(R)
(X)
Read/write
Initial value
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
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