- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377920 > MB90662A (Fujitsu Limited) 16-Bit Proprietary Microcontroller(16位專用微控制器) PDF資料下載
參數(shù)資料
| 型號(hào)： | MB90662A |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
| 中文描述： | 16位微控制器專利（16位專用微控制器） |
| 文件頁(yè)數(shù)： | 41/83頁(yè) |
| 文件大?。?/td> | 820K |
| 代理商： | MB90662A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)當(dāng)前第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)
41
MB90660A Series
8. Delayed Interrupt Generation Module
The delayed interrupt generation module is used to generate an interrupt for task switching. If this module is
used, an interrupt request to the F
2
MC-16L CPU can be generated or cancelled by software.
(1) Register Configuration
The DIRR register controls the generation and cancellation of delayed interrupt requests. A delayed interrupt
request is generated when “1” is written to this register, while a delayed interrupt request is cancelled when “0”
is written here. Request cancel status results upon reset. Although either “0” or “1” may be written into reserved
bits, we recommend using the set bit and clear bit instructions when accessing this register in consideration of
possible future extensions.
(2) Block Diagram
bit
Read/Write
Initial value
–
–
–
–
–
–
–
R0
DIRR
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(–)
(R/W)
(0)
15
14
13
12
11
10
9
8
Delayed interrupt request
generation/cancel register
Address: 000009
H
Delayed interrupt source generation/
cancel decoder
Source latch
F
2
M
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB90660A | UL/CSA, T-BEAM, D-ON |
| MB90663A | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
| MB90670 | Scan Test Devices With Octal Bus Transceivers And Registers 28-CDIP -55 to 125 |
| MB673XXX | AV CMOS SEREIS GATE ARRAYS |
| MB673xxx | CMOS Gate Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90662APFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller CMOS |
| MB90662AP-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90663A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90663APFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller CMOS |
| MB90663AP-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller CMOS |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。