參數(shù)資料
型號(hào): MB90662A
廠商: Fujitsu Limited
英文描述: 16-Bit Proprietary Microcontroller(16位專(zhuān)用微控制器)
中文描述: 16位微控制器專(zhuān)利(16位專(zhuān)用微控制器)
文件頁(yè)數(shù): 24/83頁(yè)
文件大?。?/td> 820K
代理商: MB90662A
24
MB90660A Series
(Continued)
Address
*1: Access prohibited
*2: Registers marked “R/W!” in the access column include some bits that can only be read or only be written. For
details, see the register list for each resource.
* : When a register marked “R/W!”, “R/W*” or “W” in the access column is accessed by a read-modify-write instruc-
tion (such as a bit set instruction), the bit operated on by the instruction will be set to the specified value, but a
malfunction will occur if there are any other bits which can only be written. Therefore, do not access these
locations using these instructions.
Description of Initial Values
0: The initial value of this bit is “0”.
1: The initial value of this bit is “1”.
*: The initial value of this bit is “1” or “0”. (This is determined depending on the level of the MD0 to MD2 pins.)
X: The initial value of this bit is undefined.
–: This bit is not used. The initial value is undefined.
Note: The initial value results for bits which can only be written when initialized by a reset. Note that this is not the
value when read.
Also, sometimes LPMCR, CKSCR and WDTC are initialized and sometimes they are not depending on the
type of reset. If they are initialized, the initial value is used.
Register
Name
Access
*2
Resource name
Initial value
0000B8
H
Interrupt control register 08
ICR08
R/W!
Interrupt
controller
0 0 0 0 0 1 1 1
0000B9
H
Interrupt control register 09
ICR09
R/W!
0 0 0 0 0 1 1 1
0000BA
H
Interrupt control register 10
ICR10
R/W!
0 0 0 0 0 1 1 1
0000BB
H
Interrupt control register 11
ICR11
R/W!
0 0 0 0 0 1 1 1
0000BC
H
Interrupt control register 12
ICR12
R/W!
0 0 0 0 0 1 1 1
0000BD
H
Interrupt control register 13
ICR13
R/W!
0 0 0 0 0 1 1 1
0000BE
H
Interrupt control register 14
ICR14
R/W!
0 0 0 0 0 1 1 1
0000BF
H
Interrupt control register 15
ICR15
R/W!
0 0 0 0 0 1 1 1
0000C0
H
to FF
H
System reserved area
*1
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