參數(shù)資料
型號(hào): MB90622PFV
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁(yè)數(shù): 70/80頁(yè)
文件大小: 1308K
代理商: MB90622PFV
MB90620A Series
72
Table 17
Shift Instructions (Byte/Word/Long Word) [18 Instructions]
*1: 6 when R0 is 0, 5 + (R0) in all other cases.
*2: 6 when R0 is 0, 6 + (R0) in all other cases.
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
RG
B
Operation
LH AH I
S
T
N
Z
V
C RMW
RORC A
ROLC A
RORC ear
RORC eam
ROLC ear
ROLC eam
ASR
A, R0
LSR
A, R0
LSL
A, R0
2
2+
2
2+
2
3
5+ (a)
3
5+ (a)
*1
0
2
0
2
0
1
0
2
× (b)
0
2
× (b)
0
byte (A)
← Right rotation with carry
byte (A)
← Left rotation with carry
byte (ear)
← Right rotation with carry
byte (eam)
← Right rotation with carry
byte (ear)
← Left rotation with carry
byte (eam)
← Left rotation with carry
byte(A)
←Arithmetic right barrel shift (A, R0)
byte (A)
← Logical right barrel shift (A, R0)
byte (A)
← Logical left barrel shift (A, R0)
*
*
*
*
*
ASRW A
LSRW A/SHRW A
LSLW A/SHLW A
ASRW A, R0
LSRW A, R0
LSLW A, R0
1
2
*1
0
1
0
word (A)
← Arithmetic right shift (A, 1 bit)
word (A)
← Logical right shift (A, 1 bit)
word (A)
← Logical left shift (A, 1 bit)
word(A)
←Arithmeticrightbarrelshift(A,R0)
word (A)
← Logical right barrel shift (A, R0)
word (A)
← Logical left barrel shift (A, R0)
*
*
*
R
*
*
ASRL A, R0
LSRL A, R0
LSLL
A, R0
2
*2
1
0
long (A)
← Arithmetic right shift (A, R0)
long (A)
← Logical right barrel shift (A, R0)
long (A)
← Logical left barrel shift (A, R0)
*
*
*
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