
69
MB90620A Series
Table 9 Addition and Subtraction Instructions (Byte/Word/Long Word) [42 Instructions]
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
RG
B
Operation
LH AH I
S
T
N
Z
V
C RMW
ADD
A,#mm8
ADD
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDDC A
SUB
A, #mm8
SUB
SUB
SUB
SUB
SUB
SUBC
SUBC
SUBC
SUBDC A
A, dir
A, ear
A, eam
ear, A
eam, A
A
A, ear
A, eam
A, dir
A, ear
A, eam
ear, A
eam, A
A
A, ear
A, eam
2
2
2
2+
2
2+
1
2
2+
1
2
2
2
2+
2
2+
1
2
2+
1
2
5
3
4+ (a)
3
5+ (a)
2
3
4+ (a)
3
2
5
3
4+ (a)
3
5+ (a)
2
3
4+ (a)
3
0
0
1
0
2
0
0
1
0
0
0
0
1
0
2
0
0
1
0
0
0
(b)
0
(b)
0
2
×
(b)
0
0
(b)
0
0
(b)
0
(b)
0
2
×
(b)
0
0
(b)
0
byte (A)
←
(A) +imm8
byte (A)
←
(A) +(dir)
byte (A)
←
(A) +(ear)
byte (A)
←
(A) +(eam
byte (ear)
←
(ear) + (A)
byte (eam
←
(eam + (A)
byte (A)
←
(AH) + (AL) + (C)
byte (A)
←
(A) + (ear) + (C)
byte (A)
←
(A) + (eam + (C)
byte (A)
←
(AH) + (AL) + (C) (decimal)
byte (A)
←
(A) –imm8
byte (A)
←
(A) – (dir)
byte (A)
←
(A) – (ear)
byte (A)
←
(A) – (eam
byte (ear)
←
(ear) – (A)
byte (eam
←
(eam – (A)
byte (A)
←
(AH) – (AL) – (C)
byte (A)
←
(A) – (ear) – (C)
byte (A)
←
(A) – (eam – (C)
byte (A)
←
(AH) – (AL) – (C) (decimal)
word (A)
←
(AH) + (AL)
word (A)
←
(A) +(ear)
word (A)
←
(A) +(eam
word (A)
←
(A) +imm16
word (ear)
←
(ear) + (A)
word (eam
←
(eam + (A)
word (A)
←
(A) + (ear) + (C)
word (A)
←
(A) + (eam + (C)
word (A)
←
(AH) – (AL)
word (A)
←
(A) – (ear)
word (A)
←
(A) – (eam
word (A)
←
(A) –imm16
word (ear)
←
(ear) – (A)
word (eam
←
(eam – (A)
word (A)
←
(A) – (ear) – (C)
word (A)
←
(A) – (eam – (C)
long (A)
←
(A) + (ear)
long (A)
←
(A) + (eam
long (A)
←
(A) +imm32
long (A)
←
(A) – (ear)
long (A)
←
(A) – (eam
long (A)
←
(A) –imm32
Z
Z
Z
Z
–
Z
Z
Z
Z
Z
Z
Z
Z
Z
–
–
Z
Z
Z
Z
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
–
–
–
–
–
*
–
–
–
–
–
–
–
–
–
*
–
–
–
–
ADDW
ADDW
ADDW
ADDW A, #mm16
ADDW
ear, A
ADDW
eam, A
ADDCWA, ear
ADDCWA, eam
SUBW
A
SUBW
A, ear
SUBW
A, eam
SUBW A, #mm16
SUBW
ear, A
SUBW
eam, A
SUBCW A, ear
SUBCW A, eam
A
A, ear
A, eam
1
2
2+
3
2
2+
2
2+
1
2
2+
3
2
2+
2
2+
2
3
4+ (a)
2
3
5+ (a)
3
4+ (a)
2
3
4+ (a)
2
3
5+ (a)
3
4+ (a)
0
1
0
0
2
0
1
0
0
1
0
0
2
0
1
0
0
0
(c)
0
0
2
×
(c)
0
(c)
0
0
(c)
0
0
2
×
(c)
0
(c)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
–
–
–
–
–
*
–
–
–
–
–
–
–
*
–
–
ADDL
ADDL
ADDL
A, #mm32
SUBL
A, ear
SUBL
A, eam
SUBL A, #mm32
A, ear
A, eam
2
2+
5
2
2+
5
6
7+ (a)
4
6
7+ (a)
4
2
0
0
2
0
0
0
(d)
0
0
(d)
0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
–
–
–
–
–
–