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參數(shù)資料
| 型號： | MB90594G |
| 廠商： | Fujitsu Limited |
| 英文描述： | Quadruple 2-Input Positive-OR Gate 20-LCCC -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 5/51頁 |
| 文件大?。?/td> | 714K |
| 代理商： | MB90594G |
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MB90590/590G Series
5
(Continued)
*1:It is setting of DIP switch S2 when Emulation pod (MB2145-507) is used.
Please refer to the MB2145-507 hardware manual (2.7 Emulator-specific Power Pin) about details.
*2:Varies with conditions such as the operating frequency. (See section “
I
Electrical Characteristics.”)
Features
MB90591/594/594G
MB90F591A/F594A/F594G
MB90V590A/V590G
CAN Interface
Number of channels: 2
Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission responding to Remote Frame
Prioritized 16 message buffers for data and ID’s
Supports multiple messages
Flexible configuration of acceptance filtering:
Full bit compare / Full bit mask / Two partial bit masks
Supports up to 1Mbps
CAN bit timing setting:
MB90xxx:TSEG2
≥
RSJW
+
2TQ
MB90xxxG:TSEG2
≥
RSJW
Four high current outputs for each channel
Synchronized two 8-bit PWM’s for each channel
Stepping motor controller
(4 channels)
External interrupt circuit
Number of inputs: 8
Started by a rising edge, a falling edge, an “H” level input, or an “L” level input.
Sound generator
8-bit PWM signal is mixed with tone frequency from 8-bit reload counter
PWM frequency: 62.5K, 31.2K, 15.6K, 7.8KHz (at System clock = 16MHz)
Tone frequency: PWM frequency / 2 / (reload value + 1)
Clock synchronized transmission (31.25K/62.5K/125K/500K/1Mbps at machine clock
frequency of 16 MHz)
LSB first/MSB first
Extended I/O serial
interface
Clock timer
Directly operates with the system clock
Read/Write accessible Second/Minute/Hour registers
Watchdog timer
Reset generation interval: 3.58 ms, 14.33 ms, 57.23 ms, 458.75 ms
(at oscillation of 4 MHz, minimum value)
Flash Memory
Supports automatic programming, Embedded Algorithm
TM
and
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Hard-wired reset vector available in order to point to a fixed boot sector in Flash
Memory
Boot block configuration
Erase can be performed on each block
Block protection with external programming voltage
Flash Writer from Minato Electronics Inc.
Low-power consumption
(stand-by) mode
Sleep/stop/CPU intermittent operation/clock timer/hardware stand-by
Process
CMOS
Power supply voltage for
operation*
2
5 V
±
10 % (MB90V590A
,
MB90F594A
,
MB90594
,
MB90V590G,
MB90F594G, MB90594G)
5 V
±
5 % (MB90F591A, MB90591)
QFP-100
Package
PGA-256
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