參數(shù)資料
型號: MB89636RP-SH
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP64
封裝: SHRINK, DIP-64
文件頁數(shù): 119/153頁
文件大?。?/td> 7326K
代理商: MB89636RP-SH
HARDWARE CONFIGURATION
2-45
(b) PWM operation
Setting the PTX bits 1 and 2 of the CNTR1 to 1 gives the PWM operation mode. The COMR1 and 2 specify
the duty of the output pulse. Pulses can be output with 1/256 resolution and a duty of 0% to 99.6% .
When 0 (00H) is written at the COMR1 and 2, the duty of the PWM output pulse is 0%; when 128 (80H) is
written, the duty is 50%, and when 255 (FFH) is written, it is 99.6%.
The value of COMR is transferred to the comparator latch when the value of the counter is 00H. If the value
of the COMR is rewritten in the PWM operation mode, it becomes effective from the next cycle.
When COMR is 00H
Fig. 2.17 PWM Pulse Output
The TIR bits 1 and 2 of the CNTR2 have no relation with the PWM operation. No interruption occurs irre
spective of the TIE bits 1 and 2.
The cycle and frequency of the PWM pulse can be changed by switching the count clock pulse. The count
clock pulse can be selected from four clock pulses from the prescaler by clock-pulse select bits SC11,
SC10, SC21, and SC20 of the CNTR1. When 1 is written at the CK12 bit of the CNTR2 register, CH1 tog-
gle output is selected as the input clock of CH2 irrespective of the values of the SC21 and SC20 bits.
Note: When the PWM operation mode is specified, do not put CH1 in the CK12 mode (do not write 1 at the
CK12 bit).
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