參數(shù)資料
型號： MB86604L
廠商： Fujitsu Limited
元件分類： 外設及接口
英文描述： Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C
中文描述： 電可擦除可編程邏輯器件
文件頁數(shù)： 4/56頁
文件大?。?/td> 1294K
代理商： MB86604L
4
MB86604L
I
PIN DESCRIPTION
1.
SCSI Interface
* :Regarding the status of information transfer which is indicated by MSG, C/D, and I/O pins, See Table Phase Status.
Pin
number
Symbol
Pin name
I/O
Function
60
REQ
Request
I/O
Transfer request signal in the information transfer phases from
target to initiator. The input signal to this pin is used for the timing
control of data transfer sequence. This is a three-state I/O pin
and an active low pin.
68
ACK
Acknowledge
I/O
This pin is for the acknowledge signal from initiator to target for
the REQ signal in the information transfer phases. The input
signal to this pin is used for the timing control of data transfer
sequence. This is a three-state I/O pin and an active low pin.
71
ATN
Attention
I/O
This pin is for the attention signal that initiator requests target for
the message transfer phase. This is an active-low pin.
63
MSG*
Message
I/O
This pin is for the message signal that specifies type of
information transferred on the data bus. This is an active-low pin
and becomes “L” when message phase is specified.
61
C/D*
Control/data
I/O
This pin is for the control/data signal that specifies type of
information transferred on the data bus. This an active-low pin
and becomes “L” level when command, status, or message
phase is specified.
58
I/O*
Input/output
I/O
This pin is for the input/output signal that specifies direction of
information transferred on the data bus. This is an active-low pin.
When this pin is “L” level, the information is transferred from
target to initiator. When this pin is “H” level, the information is
transferred from initiator to target.
69
BSY
Busy
I/O
This pin is for the SCSI bus busy signal. In the arbitration phase,
this is for the request signal for the use of bus acquisition. This is
an active-low pin.
62
SEL
Select
I/O
This pin is for the select signal used by initiator to select target
during the selection phase and by target to reselect initiator
during the reselection phase. This is an active-low pin.
67
RST
Reset
I/O
This pin is for the reset signal used by any device on the bus.
When the device is an input operation, the reset signal is input to
this pin. When output operation, the reset signal is output from
this pin. This is an active-low pin.
11, 12, 13,
17, 18, 19,
20, 22
DB7
to
DB0
Data bus 7
to
data bus 0
I/O
These pins are for the bidirectional 8-bit SCSI data bus and 1-bit
odd parity line.
9
DBP
Data bus
parity
相關PDF資料
PDF描述
MB86604 Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C
MB86604LPFV Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C
MB86605 SCSI-II Protocol Controller(with PCI interface)(SCSI-II 協(xié)議控制器(帶PCI接口))
MB86606A FAST-20 SCSI Protocol Controller
MB86606APMT2 FAST-20 SCSI Protocol Controller
相關代理商/技術參數(shù)
參數(shù)描述
MB86604LPFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:SCSI-II Protocol Controller (with single-ended driver/receiver)
MB86606A 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller
MB86606APMT2 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FAST-20 SCSI Protocol Controller
MB86612 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC)
MB86612PBT 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC)
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