參數(shù)資料
型號: MB8502E064AA-70
廠商: Fujitsu Limited
英文描述: 144-PIN SO DIMM 2 M×64 BITS Hyper Page Mode Dram Module(CMOS 2 M×64 位超級頁面存取模式動態(tài)RAM模塊)
中文描述: 144引腳的SO DIMM內(nèi)存2米× 64位超頁模式DRAM模塊的CMOS(2米× 64位超級頁面存取模式動態(tài)內(nèi)存模塊)
文件頁數(shù): 1/18頁
文件大?。?/td> 361K
代理商: MB8502E064AA-70
DS05-11230-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
MEMORY
Unbuffered
144-PIN SO DIMM 2 M
HYPER PAGE MODE DRAM MODULE
×
64 BITS
MB8502E064AA-60/-70/-60L/-70L
Unbuffered, 2 M
×
64 BITS Hyper Page Mode SO DIMM, 3.3 V, 1-bank, 2 KR
I
DESCRIPTION
The Fujitsu MB8502E064AA is a fully decoded, CMOS Dynamic Random Access Memory (DRAM) module
consisting of eight MB81V17805A devices. The MB8502E064AA is optimized for those applications requiring
small size package, low power consumption, enhanced performance. The operation and electrical characteristics
of the MB8502E064AA are the same as the MB81V17805A which features hyper page mode (EDO) operation.
For ease of memory expansion, the MB8502E064AA is offered in an 144-pin Small Outline Dual In-line Memory
Module package (SO DIMM).
I
PRODUCT LINE & FEATURES
Parameter
MB8502E064AA
-60
-60L
-70
-70L
RAS Access Time
60 ns max.
70 ns max.
Random Cycle Time
104 ns min.
125 ns min.
Address Access Time
30 ns max.
35 ns max.
CAS Access Time
15 ns max.
17 ns max.
Hyper Page Mode Cycle Time
25 ns min.
30 ns min.
Power Dissipation
Operating Mode
3456 mW max.
3168 mW max.
Standby Mode
57.6 mW max.
28.8 mW max.
57.6 mW max.
28.8 mW max.
Conformed to 144-pin SO DIMM JEDEC standard
Organization : 2,097,152 words
×
64 bits
Module Size : 1.00” (hight)
×
2.66” (length)
×
0.15” (thick)
Memory :MB81V17805A (2 M
×
8, 2 K ref., 3.3 V)
8 pcs
3.3 V
±
0.3 V Supply Voltage
2,048 Refresh Cycles / 32.8 ms
Hyper Page Operation (EDO)
Serial Presence Detect
RAS-Only Refresh / CAS-before-RAS Refresh
Package and Ordering Information:
144-pin SO DIMM, order as
MB8502E064AA-xxDG
(DG = Gold Pad)
相關(guān)PDF資料
PDF描述
MB8502E064AA-70L 144-PIN SO DIMM 2 M×64 BITS Hyper Page Mode Dram Module(CMOS 2 M×64 位超級頁面存取模式動態(tài)RAM模塊)
MB8502E064AA-60 144-PIN SO DIMM 2 M×64 BITS Hyper Page Mode Dram Module(CMOS 2 M×64 位超級頁面存取模式動態(tài)RAM模塊)
MB8502E064AB-60 CMOS 2M×64 BIT Hyper Page Mode DRAM Module(CMOS 2M×64 位超級頁面存取模式動態(tài)RAM模塊)
MB8502E064AB-70 CMOS 2M×64 BIT Hyper Page Mode DRAM Module(CMOS 2M×64 位超級頁面存取模式動態(tài)RAM模塊)
MB8502S064AC-100 CMOS 2M×64 Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 2M×64位同步動態(tài)RAM)
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