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參數(shù)資料
| 型號： | MB8502E064AB-70 |
| 廠商： | Fujitsu Limited |
| 英文描述： | CMOS 2M×64 BIT Hyper Page Mode DRAM Module(CMOS 2M×64 位超級頁面存取模式動態(tài)RAM模塊) |
| 中文描述： | 的CMOS 200萬× 64位超頁模式內(nèi)存的CMOS（200萬× 64位超級頁面存取模式動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 163K |
| 代理商： | MB8502E064AB-70 |
1
DS05-11221-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
MEMORY
CMOS
2 M
×
HYPER PAGE MODE DRAM MODULE
64 BITS
MB8502E064AB-60/-70
Buffered, 2 M
×
64 BITS Hyper Page Mode DRAM Module, 5 V, 1-bank
I
DESCRIPTION
The Fujitsu MB8502E064AB is a fully decoded, CMOS Dynamic Random Access Memory (DRAM) module
consisting of eight MB8117805A devices. The MB8502E064AB is optimized for those applications requiring high
speed, high performance and large memory storage. The operation and electrical characteristics of the
MB8502E064AB are the same as the MB8117805A which features hyper page mode (EDO) operation. For ease
of memory expansion, the MB8502E064AB is offered in an 168-pin Dual In-line Memory Module package (DIMM).
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PRODUCT LINE & FEATURES
Parameter
MB8502E064AB-60
MB8502E064AB-70
RAS Access Time
60 ns max.
70 ns max.
Random Cycle Time
104 ns min.
124 ns min.
Address Access Time
35 ns max.
40 ns max.
CAS Access Time
20 ns max.
22 ns max.
Hyper Page Mode Cycle Time
25 ns min.
30 ns min.
Power Dissipation
Operating Mode
6600 mW max.
6105 mW max.
Standby Mode
440 mW max.
440 mW max.
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be
taken to avoid application of any voltage higher than maximum rated voltages to this high-impedance circuit.
Conformed to 8-Byte DIMM JEDEC standard
Organization: 2,097,152 words
×
64 bits
Module Size: 1.00” (height)
×
5.25” (length)
×
0.350” (thick)
Memory: MB8117805A (2 M
×
8, 2 K ref.),
8 pcs
TI’s Input Buffers, 2 pcs
TI’s Input Driver for Buffered PD, 1 pc
Parallel Presence Detect
5.0 V + 10% Supply Voltage
2,048 Refresh Cycles / 32.8 ms
Hyper Page Operation (EDO)
RAS-only Refresh / CAS-before-RAS Refresh
Package and Ordering Information:
168-pin DIMM, order as
MB8502E064AB-
××
DG (DG = Gold Pad)
相關PDF資料 |
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| MB8502S064AC-100 | CMOS 2M×64 Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 2M×64位同步動態(tài)RAM) |
| MB8502S064AC-67 | CMOS 2M×64 Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 2M×64位同步動態(tài)RAM) |
| MB8502S064AC-84 | CMOS 2M×64 Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 2M×64位同步動態(tài)RAM) |
| MB8502S064AD-100 | CMOS 2M×64Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 2M×64 位同步位動態(tài)RAM) |
| MB8502S064AD-67 | CMOS 2M×64Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 2M×64 位同步位動態(tài)RAM) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB8508S064CE-100 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8 M x 64 BIT SYNCHRONOUS DYNAMIC RAM SO-DIMM |
| MB85101BAN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
| MB85101BBN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
| MB85101CAN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
| MB85101CBN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
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