參數(shù)資料
型號: MB84VD22183EA-85PBS
元件分類: 存儲(chǔ)器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA71
封裝: PLASTIC, BGA-71
文件頁數(shù): 12/64頁
文件大?。?/td> 1177K
代理商: MB84VD22183EA-85PBS
MB84VD2218XEA/H/2219XEA/H-70/85/90
2
(Continued)
- FLASH MEMORY
Simultaneous Read/Write Operations (dual bank)
Multiple devices available with different bank sizes (Refer to s PIN DESCRIPTION)
Host system can program or erase in one bank, then immediately and simultaneously read from the other bank
Zero latency between read and write operations
Read-while-erase
Read-while-program
Minimum 100,000 Write/Erase Cycles
Sector Erase Architecture
Eight 4 K words and sixty three 32 K words.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
Boot Code Sector Architecture
MB84VD2218X : Top sector
MB84VD2219X : Bottom sector
Embedded EraseTM* Algorithms
Automatically pre-programs and erases the chip or any sector
Embedded ProgramTM* Algorithms
Automatically writes and verifies data at specified address
Data Polling and Toggle Bit feature for detection of program or erase cycle completion
Ready-Busy Output (RY/BY)
Hardware method for detection of program or erase cycle completion
Automatic Sleep Mode
When addresses remain stable, automatically switch themselves to low power mode.
Low VCC Write Inhibit
≤≤≤≤ 2.5 V
Hidden ROM (Hi-ROM) Region
64 K byte of Hi-ROM, accessible through a new “Hi-ROM Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
WP/ACC Input Pin
At VIL, allows protection of boot sectors, regardless of sector protection/unprotection status
(MB84VD2218XEA/H : SA69, SA70 MB84VD2219XEA/H : SA0, SA1)
At VIH, allows removal of boot sector protection
At VACC, program time will reduce by 40
%.
Erase Suspend/Resume
Suspends the erase operation to allow a read in another sector within the same device
Please refer to “MBM29DL32XTE/BE” Datasheet in Detailed Function
- SRAM
Power Dissipation
Operating : 40 mA Max
Standby
: 7
A Max
Power Down Features Using CE1s and CE2s
Data Retention Supply Voltage : 1.5 V to 3.3 V
CE1s and CE2s Chip Select
Byte Data Control : LBs (DQ0-DQ7) , UBs (DQ8-DQ15)
*: Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
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