參數(shù)資料
型號： MB81164442A-67
廠商： Fujitsu Limited
英文描述： CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
中文描述： 的CMOS 4 × 4米× 16位同步動態(tài)隨機(jī)存取存儲器（SDRAM）（的CMOS 4 × 4米× 16位同步動態(tài)RAM）的
文件頁數(shù)： 5/46頁
文件大?。?/td> 642K
代理商： MB81164442A-67
5
MB81164442A-125/-100/-84/-67/-125L/-100L/-84L/-67L
I
FUNCTIONAL TRUTH TABLE Note 1
COMMAND TRUTH TABLE Notes 2, 3, and 4
Notes:
*1.
*2.
*3.
*4.
*5.
*6.
V = Valid, L = Logic Low, H = Logic High, X = either L or H.
All commands assumes no CSUS command on previous rising edge of clock.
All commands are assumed to be valid state transitions.
All inputs are latched on the rising edge of clock.
NOP and DESL commands have the same effect on the part.
READ, READA, WRIT and WRITA commands should only be issued after the corresponding bank has
been activated (ACTV command). Refer to STATE DIAGRAM.
ACTV command should only be issued after corresponding bank has been precharged (PRE or PALL
command).
Required after power up.
MRS command should only be issued after all banks have been precharged (PRE or PALL command)
and DQ has been in Hi-Z. Refer to STATE DIAGRAM.
*7.
*8.
*9.
Function
Notes Symbol
CKE
CS
RAS
CAS
WE
A
A
(BA)
13
,
A
(AP)
A
11
A
A
9
0
to
n-1
n
Device Deselect
*5
DESL
H
X
H
X
X
X
X
X
X
X
No Operation
*5
NOP
H
X
L
H
H
H
X
X
X
X
Burst Stop
BST
H
X
L
H
H
L
X
X
X
X
Read
*6
READ
H
X
L
H
L
H
V
L
X
V
Read with Auto-precharge
*6 READA
H
X
L
H
L
H
V
H
X
V
Write
*6
WRIT
H
X
L
H
L
L
V
L
X
V
Write with Auto-precharge
*6 WRITA
H
X
L
H
L
L
V
H
X
V
Bank Active (RAS)
*7
ACTV
H
X
L
L
H
H
V
V
V
V
Precharge Single Bank
PRE
H
X
L
L
H
L
V
L
X
X
Precharge All Banks
PALL
H
X
L
L
H
L
X
H
X
X
Mode Register Set
*8, 9
MRS
H
X
L
L
L
L
L
L
L
V
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MB81164442A-67L CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
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