參數(shù)資料
型號: MB15E07LPV
廠商: FUJITSU LTD
元件分類: XO, clock
英文描述: Single Serial Input PLL Frequency Synthesizer On-Chip 2.5 GHz Prescaler
中文描述: PLL FREQUENCY SYNTHESIZER, 2500 MHz, PBCC16
封裝: PLASTIC, BCC-16
文件頁數(shù): 11/23頁
文件大?。?/td> 289K
代理商: MB15E07LPV
11
MB15E07L
3. Power Saving Mode (Intermittent Mode Control Circuit)
Setting a PS pin to Low, the IC enters into power saving mode resultatly current consumption can be limited to
10
μ
A (max.). Setting PS pin to High, power saving mode is released so that the IC works normally.
In addition, the intermittent operation control circuit is included which helps smooth start up from the power
saving mode. In general, the power consumption can be saved by the intermittent operation that powering down
or waking up the synthesizer. Such case, if the PLL is powered up uncontrolled, the resulting phase comparator
output signal is unpredictable due to an undefined phase relation between reference frequency (f
r
) and
comparison frequency (f
p
) and may in the worst case take longer time for lock up of the loop.
To prevent this, the intermittent operation control circuit enforces a limited error signal output of the phase detector
during power up, thus keeping the loop locked.
During the power saving mode, the corresponding section except for indispensable circuit for the power saving
function stops working, then current consumption is reduced to 10
μ
A (max.).
Note:
While the power saving mode is executed, ZC pin should be set at “H” or open. If ZC is set at “L”
during power saving mode, approximately 10
μ
A current flows.
PS pin must be set “L” at Power-ON.
The power saving mode can be released (PS : L
H) 1
μ
s later after power supply remains stable.
During the power saving mode, it is possible to input the serial data.
ON
V
CC
Clock
Data
LE
PS
(1)
(2)
(3)
(1) PS = L (power saving mode) at Power-ON
(2) Set serial data after power supply remains stable.
(3) Relase power saving mode (PS : L
H) after setting serial data.
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