參數(shù)資料
型號: MAXQ7670EVKIT+
廠商: Maxim Integrated Products
文件頁數(shù): 24/38頁
文件大小: 0K
描述: KIT EVAL FOR MAXQ7670
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
系列: MAXQ®
類型: MCU
適用于相關(guān)產(chǎn)品: MAXQ7670
所含物品:
MAXQ7670
Microcontroller with 10-Bit ADC,
PGA, 64KB Flash, and CAN Interface
30
______________________________________________________________________________________
Crystal Selection
The MAXQ7670 uses an 8MHz or 16MHz Jauch
JXG53P2 (or similar specification):
Frequency: 8MHz or 16MHz ±0.25%.
CLOAD: 12pF.
CO: < 7pF max.
Series resonance resistance: max 50
/300 for
16MHz/8MHz, respectively.
Note: Series resonance resistance is the resistance
observed when the resonator is in the series resonant
condition. This is a parameter often stated by quartz
crystal vendors and is called R1. When a resonator is
used in the parallel resonant mode with an external
load capacitance, as is the case with the MAXQ7670
oscillator circuit, the effective resistance is sometimes
stated. This effective resistance at the loaded frequen-
cy of oscillation is:
R1 x (1 + (CO/CLOAD))2
For typical CO and CLOAD values, the effective resis-
tance can be greater than R1 by a factor of two.
Development and Technical Support
Highly versatile, affordably priced development tools
for this C are available from Maxim and third-party
suppliers. Tools for the MAXQ7670 include:
Compilers
Evaluation kits
JTAG-to-serial converters for programming and
debugging
A list of development tool vendors can be found at
www.maxim-ic.com/microcontrollers. For technical
support, go to www.maxim-ic.com/support.
MODULE NAME (BASE SPECIFIER)
REGISTER
INDEX
AP (8h)
A (9h)
PFX (Bh)
IP (Ch)
SP (Dh)
DPC (Eh)
DP (Fh)
0h
AP
A[0]
PFX[0]
IP
——
1h
APC
A[1]
PFX[1]
SP
——
2h
A[2]
PFX[2]
IV
——
3h
A[3]
PFX[3]
OFFS
DP0
4h
PSF
A[4]
PFX[4]
——
DPC
5h
IC
A[5]
PFX[5]
——
GR
6h
IMR
A[6]
PFX[6]
LC0
GRL
7h
A[7]
PFX[7]
LC1
BP
DP1
8h
SC
A[8]
——
GRS
9h
A[9]
GRH
Ah
A[10]
——
GRXL
Bh
IIR
A[11]
——
FP
Ch
A[12]
——
Dh
A[13]
——
Eh
CKCN
A[14]
——
Fh
WDCN
A[15]
——
Table 2. System Register Map
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