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參數(shù)資料
| 型號： | MAX9406ETM+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/11頁 |
| 文件大小： | 0K |
| 描述： | IC DVI/HDMI LVL SHIFTR 48TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 電平移位器 |
| 應(yīng)用： | 基站 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
MAX9406
DisplayPort to DVI/HDMI Level Shifter
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC = 3V to 3.6V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC to GND ..............................................................-0.3V to +4V
All Pins to GND...........................................-0.3V to (VCC + 0.3V)
Short-Circuit Duration (all outputs).............................Continuous
Continuous Power Dissipation (TA = +70°C)
32-Pin Thin QFN (derate 21.3mW/°C above +70°C) .1702mW
48-Pin Thin QFN (derate 27.8mW/°C above +70°C) .2222mW
Junction-to-Case Thermal Resistance (
θJC) (Note 1)
32-Pin Thin QFN........................................................+1.7°C/W
48-Pin Thin QFN........................................................+0.8°C/W
Junction-to-Ambient Thermal Resistance (
θJA) (Note 1)
32-Pin Thin QFN.........................................................+29°C/W
48-Pin Thin QFN.........................................................+25°C/W
Operating Temperature Range ..…………………-40°C to +85°C
Junction Temperature ………………………………………+150°C
Storage Temperature Range ……………………-65°C to +150°C
ESD Protection
Human Body Model (RD = 1.5kΩ, CS = 100pF)
IN_D_ and OUT_D_ to GND..........................................±1.5kV
Lead Temperature (soldering, 10s).………………………+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OE INPUT
Input High Level
VIH1
2.4
V
Input Low Level
VIL1
0.5
V
Input Current
IIN-EN
VIN = 0 to VCC
24
A
DDC_EN INPUT
Input High Level
VIH1
2.4
V
Input Low Level
VIL1
0.5
V
Input Current
IIN-DDC
VIN = 0 to VCC
100
A
HPD INPUT AND OUTPUT
Input High Level
VIH2
2.4
5.3
V
Input Low Level
VIL2
0.8
V
Input Current
IIN2
VIN = 0 to VCC
80
A
HPD_SNK Pulldown Resistance
RHPD
40
60
k
Ω
Output High Level
VOH-HPDB
2.5
VCC
V
Output Low Level
VOL-HPDB
0
0.18
0.4
V
DIFFERENTIAL INPUTS (IN_)
Differential Input High Threshold
VIDH
VID = VIN+ - VIN-
50
mV
Differential Input Low Threshold
VIDL
VID = VIN+ - VIN-
-50
mV
Common Input Voltage
VCOM
VCOD = DC Avg [(VIN+ + VIN-) / 2]
0
1.43
2
V
Common-Mode AC Tolerance
VCM_AC_P-P VCM_AC_P-P = (VIN+ + VIN-) / 2 - VCOD
100
mV
Differential Input Termination
RIN
40
60
Ω
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer board.
For detailed information on package thermal considerations, refer to
Application Note 4083 at www.maxim-ic.com/thermal-tutorial.
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