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參數(shù)資料
| 型號： | MAX9258AGCM/V+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 37/53頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SERDE PROG UART/I2C 48TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | * |
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Maxim Integrated Products 42
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
Optimally Choosing AC-Coupling Capacitors
Voltage droop and the digital sum variaton (DSV) of
transmitted symbols cause signal transitions to start
from different voltage levels. Because the transition time
is finite, starting the signal transition from different volt-
age levels causes timing jitter. The time constant for an
AC-coupled link needs to be chosen to reduce droop
and jitter to an acceptable level. The RC network for an
AC-coupled link consists of the LVDS receiver termina-
tion resistor (RTR), the LVDS driver termination resistor
(RTD), and the series AC-coupling capacitors (C). The
RC time constant for four equal-value series capacitors is
(C x (RTD + RTR))/4. RTD and RTR are required to match
the transmission line impedance (usually 100I). This
leaves the capacitor selection to change the system time
constant. In the following example, the capacitor value
for a droop of 2% is calculated:
B
TR
TD
4 t
DSV
C
ln(1- D) (R
R
)
× ×
=
×
+
where:
C = AC-coupling capacitor (F)
tB = bit time(s)
DSV = digital sum variation (integer)
ln = natural log
D = droop (% of signal amplitude)
RTD = driver termination resistor (I)
RTR = receiver termination resistor (I)
The bit time (tB) is the serial-clock period or the period
of the pixel clock divided by the total number of bits. The
maximum DSV for the MAX9257A encoding equals to the
total number of bits transmitted in one pixel clock cycle.
This means that tB x DSV = tT.
The capacitor for 2% maximum droop at 16MHz parallel
rate clock is:
B
TR
TD
4 t
DSV
C -
ln(1- D) (R
R
)
×
=
×
+
Total number of bits is = 10 (data) + 2 (HSYNC and
VSYNC) + 2 (encoding) + 2 (parity) = 16
4 3.91ns 16
C -
ln(1- .02) (100
100 )
×
=
×
+
C ≥ 0.062FF
Jitter due to droop is proportional to the droop and tran-
sition time:
tJ = tTT x D
where:
tJ = jitter(s)
tTT = transition time(s) (0 to 100%)
D = droop (% of signal amplitude)
Jitter due to 2% droop and assumed 1ns transition time is:
tJ = 1ns x 0.02
tJ = 20ps
The transition time in a real system depends on the fre-
quency response of the cable driven by the serializer.
The capacitor value decreases for a higher frequency
parallel clock and for higher levels of droop and jitter.
Use high-frequency, surface-mount ceramic capacitors.
Power-Supply Circuits and Bypassing
All single-ended inputs and outputs on the MAX9257A
are powered from VCCIO. All single-ended outputs on the
MAX9258A are powered from VCCOUT. VCCIO and VCCOUT
can be connected to a +1.71V to +3.6V supply. The input
levels or output levels scale with these supply rails.
Board Layout
Separate the LVCMOS/LVTTL signals and LVDS signals
to prevent crosstalk. A four-layer PCB with separate
layers for power, ground, LVDS, and digital signals is
recommended. Layout PCB traces for 100I differential
characteristic impedance. The trace dimensions depend
on the type of trace used (microstrip or stripline). Note
that two 50I PCB traces do not have 100I differential
impedance when brought close together—the imped-
ance goes down when the traces are brought closer.
Route the PCB traces for an LVDS channel (there are
two conductors per LVDS channel) in parallel to maintain
the differential characteristic impedance. Place the 100I
(typ) termination resistor at both ends of the LVDS driver
and receiver. Avoid vias. If vias must be used, use only
one pair per LVDS channel and place the via for each
line at the same point along the length of the PCB traces.
This way, any reflections occur at the same time. Do not
make vias into test points for ATE. Make the PCB traces
that make up a differential pair the same length to avoid
skew within the differential pair.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9258AGCV | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Fully Programmable Serializer/Deserializer with UART/I2C Control Channel |
| MAX9258EVKIT+ | 功能描述:界面開發(fā)工具 Prog Serializer / Deserializer RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| MAX9258GCM/V+ | 功能描述:串行器/解串器 - Serdes Prog Serializer / Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9258GCM/V+T | 功能描述:串行器/解串器 - Serdes Prog Serializer / Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9258GCM+ | 功能描述:串行器/解串器 - Serdes Prog Serializer / Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
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