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參數(shù)資料
| 型號(hào)： | MAX9247GCM/V+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SERIALIZER LVDS 27BIT 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | * |
MAX9247
27-Bit, 2.5MHz-to-42MHz
DC-Balanced LVDS Serializer
______________________________________________________________________________________
11
Transition Timing
The transition words require interconnect bandwidth
and displace control data. Therefore, control data is not
sampled (see Figure 9):
Two clock cycles before DE_IN goes high
During the video phase
Two clock cycles after DE_IN goes low
The last sampled control data are latched at the deserial-
izer control data outputs during the transition and video
phases. Video data are latched at the deserializer RGB
data outputs during the transition and control phases.
Applications Information
AC-Coupling Benefits
AC-coupling increases the common-mode voltage to
the voltage rating of the capacitor. Two capacitors are
sufficient for isolation, but four capacitors—two at the
serializer output and two at the deserializer input—pro-
vide protection if either end of the cable is shorted to a
high voltage. AC-coupling blocks low-frequency
ground shifts and common-mode noise. The MAX9247
serializer can also be DC-coupled to the MAX9248/
MAX9250 deserializers.
Figures 10 and 12 show an AC-coupled serializer and
deserializer with two capacitors per link. Figures 11 and
13 show the AC-coupled serializer and deserializer with
four capacitors per link.
Selection of AC-Coupling Capacitors
See Figure 14 for calculating the capacitor values for
AC-coupling depending on the parallel clock frequen-
cy. The plot shows capacitor values for two- and four-
capacitor-per-link systems. For applications using less
than 18MHz clock frequency, use 0.1F capacitors.
Frequency-Range Setting RNG[1:0]
The RNG[1:0] inputs select the operating frequency
range of the MAX9247 serializer. An external clock with-
in this range is required for operation. Table 3 shows
the selectable frequency ranges and corresponding
data rates for the MAX9247.
RNG1
RNG0
PARALLEL
CLOCK (MHz)
SERIAL-DATA RATE
(Mbps)
0
2.5 to 5
50 to 100
0
1
5 to10
100 to 200
1
0
10 to 20
200 to 400
1
20 to 42
400 to 840
Table 3. Parallel Clock Frequency Range
Select
Figure 9. Transition Timing
PCLK_IN
CNTL_IN
DE_IN
RGB_IN
= NOT SAMPLED BY PCLK_IN
CONTROL
PHASE
CONTROL
PHASE
TRANSITION
PHASE
TRANSITION
PHASE
VIDEO PHASE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9248 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:27-Bit, 2.5MHz to 42MHz DC-Balanced LVDS Deserializers |
| MAX9248ECM/V+ | 功能描述:串行器/解串器 - Serdes 27Bit 2.5-42MHz DC Bl LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9248ECM/V+T | 功能描述:串行器/解串器 - Serdes 27Bit 2.5-42MHz DC Bl LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9248ECM+ | 功能描述:串行器/解串器 - Serdes 27Bit 2.5-42MHz DC Bl LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9248ECM+T | 功能描述:串行器/解串器 - Serdes 27Bit 2.5-42MHz DC Bl LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
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