參數(shù)資料
型號(hào): MAX9129EUE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 通用總線功能
英文描述: Quad Bus LVDS Driver with Flow-Through Pinout
中文描述: QUAD LINE DRIVER, PDSO16
封裝: 4.40 MM, TSSOP-16
文件頁(yè)數(shù): 7/13頁(yè)
文件大?。?/td> 312K
代理商: MAX9129EUE
Detailed Description
The MAX9129 is a 200Mbps quad differential BLVDS
driver designed for multipoint, heavily loaded backplane
applications. This device accepts LVTTL/LVCMOS input
levels and translates them to output levels of 250mV to
450mV into a 27
load. The flow-through pinout simpli-
fies board layout and reduces the potential for crosstalk
between single-ended inputs and differential outputs.
Transition times are designed to reduce reflections, yet
enable high data rates. The MAX9129 can be used in
conjunction with standard quad LVDS receivers, such
as the MAX9121, to implement full-duplex multipoint
buses more efficiently than with transceivers.
Effect of Capacitive Loading
The characteristic impedance of a differential PC board
trace is uniformly reduced when equal capacitive loads
are attached at equal intervals (provided the transition
time of the signal being driven on the trace is longer
than the delay between loads). This kind of loading is
typical of multipoint buses where cards are attached at
1in or 0.8in intervals along the length of a backplane.
M
Quad Bus LVDS Driver with
Flow-Through Pinout
_______________________________________________________________________________________
7
Table 1. Input/Output Function Table
ENABLES
INPUTS
IN_
L
H
OUTPUTS
OUT_+
L
H
EN
EN
OUT_ -
H
L
H
L or open
All other combinations of
EN and
EN
X
Z
Z
Figure 4. Driver High-Impedance Delay Test Circuit
EN
GND
EN
IN_
OUT_-
OUT_+
1/4 MAX9129
GENERATOR
+1.2V
50
C
L
R
L
/2
R
L
/2
V
CC
C
L
Figure 5. Driver High-Impedance Delay Waveform
50%
EN WHEN EN = 0 OR OPEN
EN WHEN EN = V
CC
OUT_+ WHEN IN_ = 0
OUT_- WHEN IN_ = V
CC
OUT_+ WHEN IN_ = V
CC
OUT_- WHEN IN_ = 0
50%
50%
t
PLZ
t
PHZ
t
PZL
t
PZH
50%
V
CC
0
V
CC
1.2V
V
OL
V
OH
1.2V
0
50%
50%
50%
50%
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