Calibrator with I2C Interface 2 ___________" />
參數(shù)資料
型號： MAX8738EUA+T
廠商： Maxim Integrated Products
文件頁數(shù)： 6/13頁
文件大?。?/td> 0K
描述： IC CALIBR TFT VCOM 8UMAX
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,500
類型： 視頻濾波器
應用： LCD 顯示器
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）
供應商設備封裝： 8-uMAX
包裝： 帶卷 (TR)
MAX8738
EEPROM-Programmable TFT VCOM
Calibrator with I2C Interface
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VAVDD = 15V, VHV = 20V, VOUT = 6.75V, RSET = 30.1k
, TA = 0°C to +85°C, unless otherwise noted.) (Figure 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD, SET, SCL, SDA to GND....................................-0.3V to +6V
OUT to GND ...........................................................-0.3V to +18V
AVDD, HV to GND ..................................................-0.3V to +30V
Continuous Power Dissipation
8-Pin MAX (derate 4.5mW/ °C above +70°C) ............362mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SINK CURRENT ADJUSTMENT
SET Voltage Resolution
7
Bits
SET Differential Nonlinearity
Monotonic overtemperature
-1
+1
LSB
SET Zero-Scale Error
-1
+1
+2
LSB
SET Full-Scale Error
-4
+4
LSB
SET Current
ISET
120
A
To GND, VAVDD = 20V
10
200
SET External Resistance
(Note 1)
RSET
To GND, VAVDD = 4.5V
2.25
45.00
k
DAC full scale
0.05
VSET/VAVDD Voltage Ratio
Factory set
0.024
0.025
0.026
V/V
2-WIRE INTERFACE
Logic-Input Low Voltage
VIL
SDA, SCL
0.8
V
Logic-Input High Voltage
VIH
SDA, SCL
2.1
V
Logic-Output Low Sink Current
SDA forced to 0.4V
6
mA
Logic-Input Current
VSDA = +3.3V or GND,
VSCL = +3.3V or GND
-1
+1
A
SDA and SCL Input Capacitance
SDA, SCL
5
pF
SCL Frequency
fCLK
DC
100
kHz
SCL High Time
tCLH
4000
ns
SCL Low Time
tCLL
4700
ns
SDA and SCL Rise Time
tR
(Note 2)
1000
ns
SDA and SCL Fall Time
tF
(Note 2)
300
ns
START Condition Hold Time
tHDSTT
10% of SDA to 90% of SCL
4000
ns
START Condition Setup Time
tSUSTT
4700
ns
Data Input Hold Time
tHDDAT
0ns
Data Input Setup Time
tSUDAT
250
ns
STOP Condition Setup Time
tSUSTP
4000
ns
Bus Free Time
tBF
4700
ns
Input Filter Spike Suppression
tSP
SDA, SCL (Note 2)
1
s
VDD REGULATOR
VDD Output Voltage
VDD
4.5V < VAVDD < 20V, IVDD = 0
3.1
3.6
4.5
V
VDD Power-On Reset Threshold
Rising edge, 100mV hysteresis
3.0
V
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