參數(shù)資料
型號(hào): MAX847EEI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): 電源管理
英文描述: 1-Cell, Step-Up Two-Way Pager System IC
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO28
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-28
文件頁(yè)數(shù): 15/18頁(yè)
文件大小: 167K
代理商: MAX847EEI
lation of programming etiquette (R1 and R0 are some-
times address bits and other times data bits) allows the
CH DAC to be loaded with only one write operation.
Writing all zeros to the CH DAC turns it, the CH0, CH1,
and CH2 comparators, and the NICD and BATT voltage-
sensing resistors off to minimize current consumption.
This reduces current drain from OUT by about 30μA.
Applic ations Information
Component S elec tion
The MAX847 requires minimal design calculation and is
optimized for the component values shown in Figure 2.
However, some flexibility in component selection is still
allowed, as described in the following text. A list of suit-
able components is provided in Table 7.
Inductor L1 is nominally 22μH, but values from 10μH to
47μH should be satisfactory. The inductor current rat-
ing should be 500mA or more if full output current
(80mA) is needed. If less output current is required, the
inductor current rating can be reduced proportionally
but should never be less than 250mA.
Inductor resistance should be minimized for best effi-
ciency, but since the MAX847 N-channel switch resis-
tance is typically 0.45
, efficiency does not improve
significantly for coil resistances below 0.2
.
Filter capacitors C1–C4 should be low-ESR types (tan-
talum or ceramic) for lowest ripple and best noise
rejection. A high-frequency 0.1μF ceramic cap should
be used in parallel to reduce transient noise at OUT.
The values shown in Figure 2 are optimized for each
output’s rated current. Lower required output current
allows smaller capacitance values.
Resistors at the LBI and RSIN inputs set the voltage at
which the LBO and RSO outputs trigger. The voltage
threshold for both LBI and RSI is 0.6V. The resistors
required to set a desired trip voltage, V
TRIP
(Figure 2),
are calculated by:
R1 = R2[(V
TRIP(LBO)
/ 0.6) - 1]
R3 = R4[(V
TRIP(RSO)
/ 0.6) - 1]
M
1-Cell, S tep-Up
Two-Way Pager S ystem IC
______________________________________________________________________________________
15
D7 (MSB)
D5
D3–D0
CH2_OUT
CH0_OUT
X
D6
CH1_OUT
D4
LBO
FUNCTION
CH_ OUT and LBO output bits. A 1 indicates
that the selected channel (CH_) voltage is
greater than the CH DAC voltage or that LBI is
less than 0.6V.
Table 5. Serial Output Data
SERIAL-DATA BIT
OV4
0
0
0
0
0
0
0
0
OV2
0
0
0
0
1
1
1
1
OV0
0
1
0
1
0
1
0
1
OV3
0
0
0
0
0
0
0
0
OV1
0
0
1
1
0
0
1
1
V
OUT
(V)
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
Table 6. V
OUT
Output Voltage
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