- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄180539 > MAX6853AEE-T (MAXIM INTEGRATED PRODUCTS INC) 2-Wire Interfaced, 5 x 7 Matrix Vacuum-Fluorescent Display Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | MAX6853AEE-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 顯示驅(qū)動(dòng)器 |
| 英文描述： | 2-Wire Interfaced, 5 x 7 Matrix Vacuum-Fluorescent Display Controller |
| 中文描述： | VACUUM FLUOR DISPLAY DRIVER, PDSO16 |
| 封裝： | 0.150 INCH, 0.25 MM PITCH, MO-137, QSOP-16 |
| 文件頁(yè)數(shù)： | 4/35頁(yè) |
| 文件大?。?/td> | 489K |
| 代理商： | MAX6853AEE-T |
第1頁(yè)第2頁(yè)第3頁(yè)當(dāng)前第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)
MAX6853
2-Wire Interfaced, 5
7 Matrix Vacuum-
Fluorescent Display Controller
12
______________________________________________________________________________________
down mode is overridden when in display test mode.
For normal operation, set S bit to 1.
When the MAX6853 is in shutdown mode, the multiplex
oscillator is halted at the end of the current 100s multi-
plex period (OSC = 4MHz), and the VFBLANK output is
used to disable the VFD tube driver. Data in the digit
and other control registers remains unaltered.
If the PUMP output is configured as a square-wave
clock, then the PUMP output is forced low for the dura-
tion of shutdown, and the square-wave clock restored
when the MAX6853 comes out of shutdown.
If the PHASE1 output or PHASE2 output is configured as
a filament driver, then that output is forced low for the
duration of shutdown and the filament drive waveforms
restored when the MAX6853 comes out of shutdown.
When the MAX6853 comes out of shutdown, the exter-
nal VFD tube driver is presumed to contain invalid data.
The VFBLANK output is used to disable the VFD tube
driver for the first multiplex cycle after exiting shutdown,
clearing any invalid data. The next multiplex cycle uses
newly sent valid data.
Configuration Lock (L Data Bit D1) Format
The configuration lock register is a safety feature to
reduce the risk of the VFD configuration settings being
inadvertently changed due to spurious writes if soft-
ware fails. When set, the shift-limit register (0x0E), grids
register (0x03), and output map data (0x06) can be
read but cannot be written. The output map data point-
er itself may be written in order to allow the output map
data to be read back (Table 19).
Blink Rate Selection (B Data Bit D2) Format
The B bit in the configuration register selects the blink
rate of the cursor and annunciator segments. This is the
speed that the segments blink on and off when blinking
is selected for these segments. The frequency of the
multiplex clock OSC and the setting of the B bit (Table
20) determine the blink rate.
COMMAND ADDRESS
REGISTER
D15
D14
D13
D12
D11
D10
D9
D8
HEX
CODE
Digit 0 5 x 7 matrix character, 1st row
0
1
0
0x20
Digit 1 5 x 7 matrix character, 1st row
0
1
0
1
0x21
Digit 2 5 x 7 matrix character, 1st row
0
1
0
1
0
0x22
UP TO
—
———
——
—
Digit 45 5 x 7 matrix character, 1st row
0
1
0
1
0
1
0x4D
Digit 46 5 x 7 matrix character, 1st row
0
1
0
1
0
0x4E
Digit 47 5 x 7 matrix character, 1st row
0
1
0
1
0x4F
Digit 0 5 x 7 matrix character, 2nd row
0
1
0
1
0
0x50
Digit 1 5 x 7 matrix character, 2nd row
0
1
0
1
0
1
0x51
Digit 2 5 x 7 matrix character, 2nd row
0
1
0
1
0
1
0
0x52
UP TO
—
———
——
—
Digit 45 5 x 7 matrix character, 2nd row
0
1
0
1
0x7D
Digit 46 5 x 7 matrix character, 2nd row
0
1
0
0x7E
Digit 47 5 x 7 matrix character, 2nd row
0
1
0x7F
Table 5. Character Register Address Map in 96/2 Mode
REGISTER DATA
MODE
COMMAND ADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
Writing character data to use font map
data with DP segment unlit
0x20 to 0x4F (48/1 mode)
0x20 to 0x7F (96/2 mode)
0
Writing character data to use font map
data with DP segment lit
0x20 to 0x4F (48/1 mode)
0x20 to 0x7F (96/2 mode)
1
Bits D6 to D0 select font characters 0 to 127
Table 6. Character Registers Format
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX685C/D | Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD |
| MAX686EEE+ | DAC-Controlled Boost Inverter LCD Bias Supply with Internal Switch |
| MAX686EEE+T | DAC-Controlled Boost Inverter LCD Bias Supply with Internal Switch |
| MAX6870ETJ+T | EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC |
| MAX6870ETJ-T | EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX6854UK16D1+T | 功能描述:監(jiān)控電路 Single nPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6854UK16D1-T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6854UK16D2+T | 功能描述:監(jiān)控電路 Single nPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6854UK16D2-T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6854UK16D3 | 制造商:Maxim Integrated Products 功能描述:NANOPOWER MICROPROCESSOR SUPERVISOR - Cut Tape Product |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。