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參數(shù)資料
| 型號： | MAX6659MEE+T |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 165K |
| 描述： | IC TEMP SENSOR SMBUS 16-QSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應(yīng)溫度： | -55°C ~ 125°C，外部傳感器 |
| 精確度： | ±5°C（最小值） |
| 拓?fù)洌?/td> | ADC，多路復(fù)用器，寄存器庫 |
| 輸出類型： | I²C?/SMBus? |
| 輸出警報： | 是 |
| 輸出風(fēng)扇： | 是 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-QSOP |
| 包裝： | 帶卷 (TR) |
control can be used to reduce the supply current in
portable-equipment applications. The conversion rate
bytes POR state is 08h (16Hz). The MAX6657/
MAX6658/MAX6659 use only the 4 least-significant bits
(LSBs) of this register. The 4 most-significant bits
(MSBs) are dont care and should be set to zero when
possible. The conversion rate tolerance is ?5% at any
rate setting.
Valid A/D conversion results for both channels are
available one total conversion time (125ms nominal,
156ms maximum) after initiating a conversion, whether
conversion is initiated through the RUN/STOP bit, hard-
ware STBY pin, one-shot command, or initial power-up.
Slave Addresses
The MAX6657/MAX6658 have a fixed address of
1001100. The MAX6659 can be programmed to have
one of three different addresses, allowing up to three
devices to reside on the same bus without address
conflicts. Table 8 lists address information.
The address pin state is checked at POR only, and the
address data stays latched to reduce quiescent supply
current due to the bias current needed for high-Z state
detection.
The MAX6657/MAX6658/MAX6659 also respond to the
SMBus Alert Response slave address (see Alert
Response Address section).
POR and UVLO
The MAX6657/MAX6658/MAX6659 have a volatile
memory. To prevent unreliable power-supply conditions
from corrupting the data in memory and causing erratic
behavior, a POR voltage detector monitors V
CC
and
clears the memory if V
CC
falls below 1.7V (typ, see
Electrical Characteristics). When power is first applied
and V
CC
rises above 2.0V (typ), the logic blocks begin
operating, although reads and writes at V
CC
levels
below 3.0V are not recommended. A second V
CC
com-
parator and the ADC undervoltage lockout (UVLO)
comparator prevent the ADC from converting until there
is sufficient headroom (V
CC
= +2.8V typ).
Power-Up Defaults
Power-up defaults include:
" ADC begins autoconverting at a 16Hz rate (legacy
resolution).
" THIGH and TLOW registers are set to default limits,
respectively.
" Interrupt latch is cleared.
" Address-select pin is sampled (MAX6659 only).
" Command register is set to 00h to facilitate quick
internal Receive Byte queries.
" Hysteresis is set to 10癈.
" Transistor type is set to a substrate or common col-
lector PNP.
14 ______________________________________________________________________________________
DATA
CONVERSION RATE (Hz)
00h
0.0625
01h
0.125
02h
0.25
03h
0.5
04h
1
05h
2
06h
4
07h
8
08h
16
09h
16
0Ah-FFh
Reserved
ADD CONNECTION
ADDRESS
GND
1001100
V
CC
1001110
Unconnected
1001101
Table 8. Slave Address Decoding for
MAX6659
Note: Extended resolution applies only for conversion rates of
4Hz or slower.
Table 7. Conversion-Rate
Control Byte
BIT
NAME
FUNCTION
7 (MSB)
ADD7
6
ADD6
5
ADD5
4
ADD4
3
ADD3
2
ADD2
1
ADD1
Provide the current
MAX6659 slave address
that was latched at POR
(Table 8)
0 (LSB)
1
Logic 1
Table 9. Read Format for Alert Response
Address (000 1100)
?癈, SMBus-Compatible Remote/Local Temperature
Sensors with Overtemperature Alarms
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