Slow-Comparator Startup Period
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
Slow-Comparator Normal Operation
After the startup period is complete the slow compara-
tor is enabled and the device enters normal operation.
The comparator threshold voltage (V
SC,TH)
is fixed at
25mV for the MAX5904/MAX5905 and is adjustable
from 25mV to 100mV for the MAX5906MAX5909. The
slow-comparator response time decreases to a mini-
mum of 110祍 with a large overdrive voltage (Figure 9).
Response time is 3ms for a 1mV overdrive. The variable
speed response time allows the MAX5904MAX5909 to
ignore low-amplitude momentary glitches, thus increas-
ing system noise immunity. After an extended overcur-
rent condition, a fault is generated, PGOOD is pulled
low, and the MOSFET gates are discharged with a
strong 3mA pulldown current.
Fast-Comparator Startup Period
During the startup period the fast comparator regulates
the gate voltage to ensure that the voltage across the
sense resistor does not exceed V
SU,TH
. The startup
fast-comparator threshold voltage (V
SU,TH
) is scaled to
two times the slow-comparator threshold (V
SC,TH
).
Fast-Comparator Normal Operation
In normal operation, if the load current reaches the fast-
comparator threshold, a fault is generated, PGOOD is
pulled low, and the MOSFET gates are discharged with
a strong 3mA pulldown current. This happens in the
event of a serious current overload or a dead short. The
fast-comparator threshold voltage (V
FC,TH
) is scaled to
four times the slow-comparator threshold (V
SC,TH
). This
comparator has a fast response time of 260ns (Figure 9).
Undervoltage Lockout (UVLO)
The undervoltage lockout prevents the MAX5904
MAX5909 from turning on the external MOSFETs until
one input voltage exceeds the UVLO threshold (2.4V)
for t
D,UVLO
. The MAX5904MAX5909 use power from
the higher input voltage rail for the charge pumps. This
allows for more efficient charge-pump operation. The
UVLO protects the external MOSFETs from an insuffi-
cient gate drive voltage. t
D,UVLO
ensures that the board
is fully inserted into the backplane and that the input
voltages are stable. Any input voltage transient on both
supplies below the UVLO threshold will reinitiate the
t
D,UVLO
and the startup period.
Latched and Autoretry Fault Management
The MAX5905/MAX5907/MAX5909 latch the external
MOSFETs off when a fault is detected. Toggling ON
below 0.4V or one of the supply voltages below the
UVLO threshold for at least 100祍 clears the fault latch
and reinitiates the startup period. Similarly, the
MAX5904/MAX5906/MAX5908 turn the external
MOSFETs off when a fault is detected then automatical-
ly restart after the autoretry delay that is internally set to
64 times t
START
. During the autoretry delay, toggling
ON below 0.4V does not clear the fault. The autoretry
can be overridden causing the startup period to begin
immediately by toggling one of the supply voltages
below the UVLO threshold.
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
______________________________________________________________________________________   11
t
ON
4.8V TO 5.8V
V
GATE
V
GATE
PGOOD
ON
V
TH
V
OUT
V
OUT
I
LOAD
t
START
+ t
PGDLY
C
BOARD
= LARGE
C
BOARD
= 0
V
SU,TH
R
SENSE
Figure 2. Startup Waveforms