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參數(shù)資料
| 型號(hào)： | MAX5886EGK+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT 3.3V 500MSPS 68-QFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 11ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 130mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 68-QFN 裸露焊盤（10x10） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 500M |
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, VREFIO = 1.25V, differential transformer-coupled
analog output, 50
double terminated (Figure 7), IOUT = 20mA, TA = TMIN to TMAX, unless otherwise noted. ≥+25°C guaranteed by
production test, <+25°C guaranteed by design and characterization. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Data Latency
3.5
Clock
cycles
Minimum Clock Pulse Width High
tCH
CLKP, CLKN
0.9
ns
Minimum Clock Pulse Width Low
tCL
CLKP, CLKN
0.9
ns
LVDS LOGIC INPUTS (B0N–B11N, B0P–B11P)
Differential Input Logic High
VIH
100
mV
Differential Input Logic Low
VIL
-100
mV
Common-Mode Voltage Range
VCOM
1.125
1.375
V
Differential Input Resistance
RIN
85
100
125
Input Capacitance
CIN
5pF
CMOS LOGIC INPUTS (PD, SEL0)
Input Logic High
VIH
0.7 x
DVDD
V
Input Logic Low
VIL
0.3 x
DVDD
V
Input Leakage Current
IIN
-15
+15
A
Input Capacitance
CIN
5pF
CLOCK INPUTS (CLKP, CLKN)
Sine wave
≥1.5
Differential Input Voltage Swing
VCLK
Square wave
≥0.5
VP-P
Differential Input Slew Rate
SRCLK
(Note 5)
>100
V/s
Common-Mode Voltage Range
VCOM
1.5
±20%
V
Input Resistance
RCLK
5k
Input Capacitance
CCLK
5pF
POWER SUPPLIES
Analog Supply Voltage Range
AVDD
3.135
3.3
3.465
V
Digital Supply Voltage Range
DVDD
3.135
3.3
3.465
V
Clock Supply Voltage Range
VCLK
3.135
3.3
3.465
V
fCLK = 100Msps, fOUT = 1MHz
27
Analog Supply Current
IAVDD
Power-down
0.3
mA
fCLK = 100Msps, fOUT = 1MHz
6.4
mA
Digital Supply Current
IDVDD
Power-down
10
A
fCLK = 100Msps, fOUT = 1MHz
5.6
mA
Clock Supply Current
IVCLK
Power-down
10
A
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