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參數(shù)資料
| 型號： | MAX5856AECM+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 13/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT DUAL 300MSPS 48-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 設(shè)置時間： | 11ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 792mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 300M |
MAX5856A
Dual 8-Bit, 300Msps DAC with 4x/2x/1x
Interpolation Filters and PLL
20
______________________________________________________________________________________
CLKXP
1
CLK
2
tCXD
tDCSR
tDCSF tDCHF
tDCHR
DAN
DBN+1
DAN+1
DBN+2
DAN+2
1. CLKXP AND CLKXN MUST BE PRESENT ONLY WHEN PLL IS DISABLED, WITH PLLEN CONNECTED TO GND. THE DIAGRAM SHOWS 4x INTERPOLATION.
2. CLK IS AN OUTPUT WHEN PLL IS DISABLED, WITH PLLEN CONNECTED TO GND; OTHERWISE, IT IS AN INPUT.
CLKXN
1
DA0–DA7
tCXD
Figure 7. Timing Diagram for Interleave Data Mode (IDE = High)
1/2 MAX5856A
DA0–DA7
8
1/2 MAX5856A
DB0–DB7
8
AVDD DVDD PVDD
AGND DGND PGND
OUTPA
OUTNA
50
100
VOUTA
SINGLE ENDED
OUTPB
OUTNB
50
100
VOUTB
SINGLE ENDED
Figure 8. Application with Output Transformer Performing
Differential to Single-Ended Conversion
The MAX5856A can operate in interleave data mode by
setting IDE = 1. In interleave data mode, data for both
DAC channels is written through input port A. Channel
B data is written on the falling edge of the CLK signal
and then channel A data is written on the following ris-
ing edge of the CLK signal. Both DAC outputs (channel
A and B) are updated simultaneously on the next rising
edge of CLK. In interleave data mode, the maximum
input data rate per channel is one-half the rate of nonin-
terleave mode. Interleave data mode is an attractive
feature that lowers digital I/O pin count, reduces digital
ASIC cost, and improves system reliability (Figure 7).
Applications Information
Differential-to-Single-Ended Conversion
The MAX5856A exhibits excellent dynamic perfor-
mance to synthesize a wide variety of modulation
schemes, including high-order QAM modulation with
OFDM.
Figure 8 shows a typical application circuit with output
transformers performing the required differential-to-sin-
gle-ended signal conversion. In this configuration, the
MAX5856A operates in differential mode, which
reduces even-order harmonics, and increases the
available output power.
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| MAX5858AECM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX5858AECM+D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 2Ch 300Msps DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5858AECM+TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 2Ch 300Msps DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5858AECM-D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5858AECM-TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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