The MAX5773/MAX5774/MAX5775 support daisy-chain
connections of multiple devices. The default (power-up)
configuration for the MAX5773/MAX5774/MAX5775
assumes that the device may be part of a daisy chain
of devices (SING = 0 and DSP = 1). For a write com-
mand, DOUT follows DIN after 32 clock cycles in the
default configuration. Figures 6 and 7 show examples
of daisy-chain data sequences.
Data Readback
Read the contents of the MAX5773/MAX5774/MAX5775
DAC and configuration registers at DOUT by issuing a
read-data command. Control bits C3–C0 configure the
device for the read-data modes (see Table 8). The
address bits select the register(s) to be read. The con-
tents of the register(s) are clocked out MSB first at
DOUT on the falling edge of SCLK. The output data for-
mat depends on the status of DSP and SING. Table 13
shows the manner in which data is written to DOUT.
Shutdown Mode
The MAX5773/MAX5774/MAX5775 feature a software-
controlled, low-power shutdown mode.
Setting bit 9 of the configuration register to a logic high,
disables the analog section of the device, forcing the
outputs to go high impedance. In shutdown, supply
current is reduced to 50A typical. Data stored in the
DAC and input registers is retained, and the device
outputs return to their previous values upon exiting
shutdown. Wake-up time is 5s (typ). The serial inter-
face remains active while the device is in shutdown.
Power-Up State
The MAX5773/MAX5774/MAX5775 monitor the four
power supplies and maintain the output buffers in a
known state until sufficient voltage is available to ensure
that no output glitches occur. Once the minimum voltage
threshold has been exceeded, the device outputs come
up in the clear state (all outputs = 0).
Applications Information
Automatic Test Equipment (ATE)
Applications
The MAX5773/MAX5774/MAX5775 include many fea-
tures suited for ATE applications. These devices are
the most highly integrated level-setting solution avail-
able for high-density pin electronics boards, and pro-
vide the output voltage ranges required by most ATE
applications. The offset DAC simultaneously adjusts the
voltage range of all 32 DACs, allowing optimization to
the application. The remote-sense feature (GS1 and
GS2) allows the pin electronic voltages to be refer-
enced to the ground potential at the DUT site. An inte-
grated offset and gain feature eliminates the need for
costly external circuitry.
The pipelined register architecture allows all 32 DACs
to be updated simultaneously. This is valuable during
test setups, as all values in the tester can be set and
then updated in unison with a single command.
Accessing the serial interface or the LDAC input
updates all 32 DACs simultaneously.
The low output noise of the MAX5773/MAX5774/
MAX5775 allows direct connection to the pin electron-
ics, eliminating the cost and PC board area of exter-
nal filtering.
Modern pin electronics integrated circuits (PEICs) are
typically fabricated on high-speed processes with low
breakdown voltages. Some devices require external
protection on their reference inputs to satisfy absolute
maximum ratings. The MAX5773/MAX5774/MAX5775
feature outputs that are almost rail-to-rail allowing the
AVCC and VSS supplies to be set to voltages within the
absolute maximum ratings of the PEIC to guarantee
that the PEIC is protected in all situations.
Power Supplies, Bypassing,
Decoupling, and Layout
Grounding and power-supply decoupling strongly influ-
ence device performance. Digital signals can couple
through the reference input, power supplies, and ground
connection. Proper grounding and layout can reduce
digital feedthrough and crosstalk. For noisy environ-
ments, bypass all power supplies with a 0.1F and 1F
on each pin, as close to the device as possible.
The MAX5773/MAX5774/MAX5775 have four separate
power supplies. AVDD powers the internal analog cir-
cuitry (except for the output buffers), and DVDD powers
the digital section of the device. AVCC and VSS power
the output buffers.
MAX5773/MAX5774/MAX5775
32-Channel, 14-Bit, Voltage-Output
DACs with Serial Interface
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