參數資料
型號: MAX5734BUTN+T
廠商: Maxim Integrated Products
文件頁數: 28/28頁
文件大?。?/td> 0K
描述: IC DAC 16BIT 32CHAN SER 56-TQFN
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
設置時間: 20µs
位數: 16
數據接口: MICROWIRE?,QSPI?,串行,SPI?
轉換器數目: 32
電壓電源: 模擬和數字
功率耗散(最大): 2.5W
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-WFQFN 裸露焊盤
供應商設備封裝: 56-TQFN-EP(8x8)
包裝: 帶卷 (TR)
輸出數目和類型: 32 電壓,單極
采樣率(每秒): *
MAX5732–MAX5735
32-Channel, 16-Bit, Voltage-Output
DACs with Serial Interface
_______________________________________________________________________________________
9
ELECTRICAL CHARACTERISTICS—MAX5735 (-5V to +5V Output Voltage Range) (continued)
(AVCC = +5.25V to +5.5V, AVDD = +5V ±5%, DVDD = +2.7V to AVDD, VSS = -5.25V to -5.5V, AGND = DGND = REFGND = GS = 0,
program the offset DAC to 8000hex. VREF = +3.0V, RL =
∞, CL = 50pF referenced to ground, TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (
CS, SCLK, DIN, LDAC, CLR, DSP)
DVDD = +2.7V to +3.6V
0.7
×
DVDD
Input-Voltage High
VIH
DVDD = +4.75V to 5.25V
2.4
V
Input-Voltage Low
VIL
0.8
V
Input Capacitance
CIN
10
pF
Input Current
IIN
Digital inputs = 0 or DVDD
±1
A
POWER REQUIREMENTS (AVCC, VSS, AGND, AVDD, DVDD, DGND)
Output-Amplifier Positive Supply
Voltage
AVCC
(Note 1)
4.75
5.50
V
Output-Amplifier Negative Supply
Voltage
VSS
-5.50
-4.75
V
Output-Amplifier Supply Voltage
Difference
AVCC - VSS
11
V
Analog Supply Voltage
AVDD
4.75
5.25
V
Digital Supply Voltage
DVDD
2.70
5.25
V
VOUT0 through VOUT31 = 0
10
15
mA
Analog Supply Current
AIDD
Software shutdown
10
A
VIH = DVDD, VIL = 0, fSCLK = 20MHz
2.5
3.5
Digital Supply Current
DIDD
VIH = +2.4V, VIL = +0.8V, fSCLK = 20MHz
5
6.5
mA
VOUT0 through VOUT31 = 0
4
10
mA
Output-Amplifier Positive Supply
Current
AICC
Software shutdown
20
A
VOUT0 through VOUT31 = 0
-4
-10
mA
Output-Amplifier Negative Supply
Current
ISS
VSS = -0.5V
Software shutdown
-20
A
Power-Supply Rejection Ratio
PSRR
-95
dB
Note 1: AVCC should be at least 0.25V higher than the maximum output voltage required from the DAC. Full-scale output is 5V for
the MAX5732.
Note 2: Linearity guaranteed from code 2047 to full scale and from (VSS + 0.3V) to (AVCC - 0.3V).
Note 3: DNL guaranteed over all codes for (VSS + 0.3V) to (AVCC - 0.3V).
Note 4: Zero-scale error is measured at code 0. Full-scale error is measured at code FFFFhex.
Note 5: DC crosstalk is the change in the output level of one DAC at zero or full scale in response to the full-scale output change of all
other DACs.
Note 6: Digital feedthrough is a measure of the impulse injected into the analog outputs from the digital control inputs when the
device is not being written to. It is measured with a worst-case change on the digital inputs.
Note 7: Digital crosstalk is the glitch impulse transferred to the output of one DAC at midscale while a full-scale code change is written
into another DAC.
Note 8: DAC-to-DAC crosstalk is the glitch impulse that appears at the output of one converter due to both the digital change and
subsequent analog output change at another converter.
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