參數(shù)資料
型號: MAX5511ETC+
廠商: Maxim Integrated Products
文件頁數(shù): 8/18頁
文件大?。?/td> 0K
描述: IC DAC 8BIT VOUT 12-TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 75
設(shè)置時間: 660µs
位數(shù): 8
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.35W
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 12-WQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 12-TQFN-EP(4x4)
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
MAX5510/MAX5511
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
16
______________________________________________________________________________________
Unipolar Output
Figure 7 shows the MAX5510 in a unipolar output con-
figuration with unity gain. Table 4 lists the unipolar out-
put codes.
Bipolar Output
The MAX5510 output can be configured for bipolar
operation, as shown in Figure 8. The output voltage is
given by the following equation:
VOUT = VREF x [(NA - 128) / 128]
where NA represents the numeric value of the DAC’s
binary input code. Table 5 shows digital codes (offset
binary) and the corresponding output voltage for the
circuit in Figure 4.
Configurable Output Gain
The MAX5510/MAX5511 have a force-sense output,
which provides a connection directly to the inverting ter-
minal of the output op amp, yielding the most flexibility.
The advantage of the force-sense output is that specific
gains can be set externally for a given application. The
gain error for the MAX5510/MAX5511 is specified in a
unity-gain configuration (op-amp output and inverting ter-
minals connected), and additional gain error results from
external resistor tolerances. Another advantage of the
force-sense DAC is that it allows many useful circuits to
be created with only a few simple external components.
Figure 8. Bipolar Output Circuit
DAC CONTENTS
MSB
LSB
ANALOG OUTPUT
1111
0000
+VREF (127/128)
1000
0001
0000
+VREF (1/128)
1000
0000
0V
0111
1111
0000
-VREF (1/128)
0000
0001
0000
-VREF (127/128)
0000
-VREF (128/128) = -VREF
Table 5. Bipolar Code Table (Gain = +1)
REFIN
MAX5510
OUT
VOUT
FB
V+
10k
10k
V-
DAC
BAND
GAP
TO ADC
OUT
REFOUT
MAX5511
TO ADC
FB
WE
SENSOR
CE
IF
RF
CL
REF
Figure 6. Self-Biased Two-Electrode Potentiostat Application
NA IS THE DAC INPUT CODE
(0 TO 255 DECIMAL).
REFIN
MAX5510
OUT
FB
VOUT =
VREFIN
× NA
256
DAC
Figure 7. Unipolar Output Circuit
DAC CONTENTS
MSB
LSB
ANALOG OUTPUT
1111
0000
+VREF (255/256)
1000
0001
0000
+VREF (129/256)
1000
0000
+VREF (128/256) = +VREF/2
0111
1111
0000
+VREF (127/256)
0000
0001
0000
+VREF (1/256)
0000
0V
Table 4. Unipolar Code Table (Gain = +1)
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