Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Poten" />
參數(shù)資料
型號： MAX5479EUD+T
廠商： Maxim Integrated Products
文件頁數(shù)： 5/16頁
文件大?。?/td> 0K
描述： IC POT DGTL DUAL 256-TAP 14TSSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
接片： 256
電阻（歐姆）： 100k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 70 ppm/°C
存儲器類型： 非易失
接口： I²C（設(shè)備位址）
電源電壓： 2.7 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 14-TSSOP
包裝： 帶卷 (TR)
MAX5477/MAX5478/MAX5479
Dual, 256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
______________________________________________________________________________________
13
3 bits in the slave address. Connect each address input
to VDD or GND to set these 3 bits. Each device must
have a unique address to share a common bus.
Message Format for Writing
Write to the MAX5477/MAX5478/MAX5479 by transmit-
ting the device’s slave address with NOP/W (8th bit) set
to zero, followed by at least 1 byte of information
(Figure 7). The 1st byte of information is the command
byte. The bytes received after the command byte are
the data bytes. The 1st data byte goes into the internal
register of the MAX5477/MAX5478/MAX5479 as select-
ed by the command byte (Figure 8).
Command Byte
Use the command byte to select the source and desti-
nation of the wiper data (nonvolatile or volatile memory
registers) and swap data between nonvolatile and
volatile memory registers (see Table 3).
Command Descriptions
VREG: The data byte writes to the volatile memory reg-
ister and the wiper position updates with the data in the
volatile memory register.
NVREG: The data byte writes to the nonvolatile memory
register. The wiper position is unchanged.
NVREGxVREG: Data transfers from the nonvolatile
memory register to the volatile memory register (wiper
position updates).
SDA
DATA STABLE,
DATA VALID
CHANGE OF
DATA ALLOWED
SCL
Figure 5. Bit Transfer
1
SCL
START
CONDITION
SDA
28
9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
Figure 6. Acknowledge
A
0
SLAVE ADDRESS
COMMAND BYTE
DATA BYTE
ACKNOWLEDGE FROM
MAX5477/MAX5478/MAX5479
NOP/W
1 BYTE
ACKNOWLEDGE FROM
MAX5477/MAX5478/MAX5479
ACKNOWLEDGE FROM
MAX5477/MAX5478/MAX5479
D15
D14 D13 D12 D11 D10
D9
D8
D1
D0
D3
D2
D5
D4
D7
D6
HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX5477/MAX5478/MAX5479 REGISTERS
S
A
P
S
A
0
SLAVE ADDRESS
COMMAND BYTE
ACKNOWLEDGE FROM
MAX5477/MAX5478/MAX5479
NOP/W
ACKNOWLEDGE FROM
MAX5477/MAX5478/MAX5479
D15
D14
D13
D12
D11
D10
D9
D8
COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION
AP
Figure 7. Command Byte Received
Figure 8. Command and Single Data Byte Received
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