參數(shù)資料
型號: MAX5316GTG+T
廠商: Maxim Integrated Products
文件頁數(shù): 22/33頁
文件大小: 0K
描述: IC DAC 16BIT SPI 24TQFN
產(chǎn)品培訓模塊: Obsolescence Mitigation Program
標準包裝: 2,500
設置時間: 3µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 2.29W
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應商設備封裝: 24-TQFN-EP(4x5)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
29
MAX5316
16-Bit, ±1 LSB Accuracy Voltage Output
DAC with SPI Interface
Applications Information
Power-On Reset (POR)
Upon power-on, the output is set to either zero-scale (if
M/Z is low) or midscale (if M/Z is high). The entire register
map is set to their default values as shown in Tables 7–11.
Power Supplies and
Bypassing Considerations
For best performance, use a separate supply for the
MAX5316. Bypass VDDIO, AVDD_, and AVSS with high-
quality ceramic capacitors to a low-impedance ground
as close as possible to the device. A typical high-quality
X7R 10FF capacitor can become self resonant at 2MHz.
Therefore, it is actually an inductor above 2MHz and is
useless for decoupling signals above 2MHz. It is therefore
recommended that several capacitors of different values
are connected in parallel (e.g. 0.1F || 10F). Figure 8
shows the magnitude of impedance of typical 1FF, 100nF,
and 10nF X7R capacitors. As the capacitance reduces,
the self-resonant frequency increases. In addition, the
parallel combination of all three is shown and exhibits a
significant improvement over a single capacitor. These
plots do not include any PCB trace inductance.
Minimize lead lengths to reduce lead inductance. Adding
just 2nH trace inductance to each of the typical capacitors
above produces the effects shown in Figure 9. This shows
significant reduction in the self-resonant frequencies of
the capacitors.
Internal Linear Regulator (BYPASS)
BYPASS is the output of an internal linear regulator and is
used to power digital circuitry. Connect BYPASS to DGND
with a ceramic capacitor in the range of 1FF to 10FF with
ESR in the range of 100mI to 20mI to ensure stability.
Power-Supply Sequencing
During power-up, ensure that AVDD_ comes up before
the reference does. If this is not possible, connect a
Schottky diode between the REF and AVDD_ such as
the MBR0530T1G. If REF does come up before AVDD_,
the diode conducts and clamps REF to AVDD_. Once
AVDD_ has come up, the diode no longer conducts.
REF should always be below AVDD_ as specified in the
Electrical Characteristics. AVDD_ and AVDD_ should be
connected together and powered from the same supply.
VDDIO and AVSS can be sequenced in any order. Always
perform a reset operation after all the supplies are brought
up to place the device in a known operating state.
Layout Considerations
Digital and AC transient signals on AGND inputs can
create noise at the outputs. Connect both AGND inputs
to form the star ground for the DAC system. Refer remote
DAC loads to this system ground for the best possible
performance (see the Force/Sense section).
Use proper grounding techniques, such as a multilayer
board with a low-inductance ground plane, or star con-
nect all ground return paths back to AGND. Do not use
wire-wrapped boards and sockets. Use ground plane
Figure 8. Typical X7R Capacitor Impedance
Figure 9. Typical X7R Capacitor Impedance with Additional
2nH PCB Trace Inductance
3k
1k
100
10
1
100m
10m
100k
1M
10M
100M
4m
IMPEDANCE
(I
)
FREQUENCY (Hz)
10nF
1F
100nF
10nF
1F
100nF
3k
1k
100
10
1
100m
10m
100k
1M
10M
100M
4m
IMPEDANCE
(I
)
FREQUENCY (Hz)
10nF
1F
100nF
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