參數(shù)資料
型號(hào)： MAX5316GTG+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 12/33頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT SPI 24TQFN
產(chǎn)品培訓(xùn)模塊： Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
設(shè)置時(shí)間： 3µs
位數(shù)： 16
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字，雙 ±
功率耗散（最大）： 2.29W
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 24-TQFN-EP（4x5）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 1 電壓，單極；1 電壓，雙極
2
MAX5316
16-Bit, ±1 LSB Accuracy Voltage Output
DAC with SPI Interface
AGND to DGND ...................................................-0.3V to +0.3V
AGND_F, AGND_S to AGND ...............................-0.3V to +0.3V
AGND_F, AGND_S to DGND ...............................-0.3V to +0.3V
AVDD_ to AGND .....................................................-0.3V to +6V
AVDD_ to REF .........................................................-0.3V to +6V
AVSS to AGND........................................................-2V to +0.3V
VDDIO to DGND.......................................................-0.3V to +6V
BYPASS to DGND .......................................-0.3V to the lower of
(VAVDD_ or VDDIO + 0.3V) and +6V
OUT, REFO, RFB to AGND .........................-0.3V to the lower of
(VAVDD_ + 0.3V) and +6V
REF to AGND ..............................................-0.3V to the lower of
VAVDD and +6V
SCLK, DIN, CS, BUSY, LDAC, READY,
M/Z, TC/SB, RST, PD, DOUT to DGND.......-0.3V to the lower of
(VDDIO + 0.3V) and +6V
Continuous Power Dissipation (TA = +70NC)
TQFN (derate 28.6mW/NC above +70NC) ...............2285.7mW
Operating Temperature Range........................ -40NC to +105NC
Maximum Junction Temperature.....................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
TQFN
Junction-to-Case Thermal Resistance (
qJA) ..............1.8°C/W
Junction-to-Ambient Thermal Resistance (
qJA) ..........35°C/W
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
ELECTRICAL CHARACTERISTICS
(VAVDD_ = VDDIO = 4.5V to 5.5V, VAVSS = -1.25V, VAGND = VDGND = VAGND_F = VAGND_S = 0V, VREF = 4.096V, TC/SB = PD = LDAC
= M/Z = DGND, RST = VDDIO, CREFO = 100pF, CL = 100pF, RL = 10kω, CBYPASS = 1F, TA = -40°C to +105°C, unless otherwise
noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC PERFORMANCE
Resolution
N
16
Bits
Integral Nonlinearity (Note 3)
INL
DIN = 0x0000 to 0xFFFF (binary
mode), DIN = 0x8000 to 0x7FFF (two’s
complement mode)
-1
Q
0.25
+1
LSB
DIN = 0x0640 to 0xFFFF (binary
mode), DIN = 0x8280 to 0x7FFF (two’s
complement mode), VAVSS = 0V
Differential Nonlinearity (Note 3)
DNL
-1
Q
0.25
+1
LSB
Zero Code Error
OE
DIN = 0, TA = +25NC
-19
Q
1
+19
LSB
DIN = 0, TA = -40NC to +105NC
Q
6
Zero Code Error Drift
DIN = 0
-2.5
Q
0.4
+2.5
ppm/NC
Gain Error
GE
TA = +25NC
-4
Q
0.25
+4
LSB
TA = -40NC to +105NC
Q
3
Gain Error Temperature
Coefficient
TCGE
-2.75
Q
0.6
+2.75
ppm/NC
of FSR
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