參數(shù)資料
型號(hào): MAX5216GUA+
廠商: Maxim Integrated Products
文件頁數(shù): 10/17頁
文件大小: 0K
描述: DAC 16BIT SGL BUFFERED LP 8-UMAX
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
設(shè)置時(shí)間: 14µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 387mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極
2
Maxim Integrated
14-/16-Bit, Low-Power, Buffered Output,
Rail-to-Rail DACs with SPI Interface
MAX5214/MAX5216
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
VDD to GND.............................................................-0.3V to +6V
REF, OUT, CLR to GND ..............................-0.3V to the lower of
(VDD + 0.3V) and +6V
SCLK, DIN, CS to GND...........................................-0.3V to +6V
Continuous Power Dissipation (TA = +70NC)
F
MAX (derate at 4.8mW/NC above +70NC) .................387mW
Maximum Current into Any Input or Output .................... Q50mA
Operating Temperature Range........................ -40NC to +105NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(VDD = 2.7V to 5.5V, VREF = 2.5V to VDD, CL = 60pF, RL = 10kI, TA = -40NC to +105NC, unless otherwise noted. Typical values are
at TA = +25NC.) (Note 2)
ABSOLUTE MAXIMUM RATINGS
PACKAGE THERMAL CHARACTERISTICS (Note 1)
F
MAX
Junction-to-Ambient Thermal Resistance (BJA) ........206NC/W
Junction-to-Case Thermal Resistance (BJC) ...............42NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC ACCURACY (Note 3)
Resolution
N
MAX5214
14
Bits
MAX5216
16
Integral Nonlinearity
INL
MAX5214 (14-bit) (Note 4)
-1
Q
0.4
+1
LSB
MAX5216 (16-bit) (Note 4)
-4
Q
1.2
+4
MAX5216B (16-bit) (Note 4)
-8
Q
3
+8
Differential Nonlinearity
DNL
MAX5214 (14-bit) (Note 4)
-1
Q
0.1
+1
LSB
MAX5216 (16-bit) (Note 4)
-1
Q
0.25
+1
Offset Error
OE
(Note 5)
-1.25
Q
0.25
+1.25
mV
Offset-Error Drift
Q
1.6
F
V/NC
Gain Error
GE
(Note 5)
-0.06
-0.04
0
%FS
Gain Temperature Coefficient
Q
2
ppmFS/
N
C
REFERENCE INPUT
Reference-Input Voltage Range
VREF
2
VDD
V
Reference-Input Impedance
RREF
200
256
kI
DAC OUTPUT
Output Voltage Range (Note 6)
No load (typical)
VDD
V
10kI load to GND
0
VDD -
0.2
10kI load to VDD
0.2
VDD -
0.2
DC Output Impedance
0.1
I
Capacitive Load (No Sustained
Oscillations)
CL
Series resistance = 0I
0.1
nF
Series resistance = 1kI
15
F
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