參數(shù)資料
型號: MAX5189BEEI+T
廠商: Maxim Integrated Products
文件頁數(shù): 3/14頁
文件大?。?/td> 0K
描述: IC DAC 8BIT DUAL 40MHZ 28-QSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
設(shè)置時間: 25µs
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 28-QSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電壓,單極
采樣率(每秒): *
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
______________________________________________________________________________________
11
Figure 4. Timing Diagram
X = Don’t care
Table 1. Power-Down Mode Selection
CLK
INPUT SAMPLE
N - 1
FOR DAC 1
DAC 1
N - 2
N
N + 1
N + 2
N - 2
N
N + 1
tCH
tCL
tDS1
tDS2
tCLK
DAC 2
D0–D7
DAC 1 (N - 1)
DAC 2 (N)
DAC 1 (N)
DAC 2 (N + 1)
DAC 1 (N + 1)
DAC 2 (N + 2)
DAC 1 (N + 2)
DAC 2 (N + 3)
INPUT SAMPLE N
FOR DAC 2
UPDATES DAC 1
AND DAC 2 TO N
UPDATES DAC 1
AND DAC 2 TO N + 1
UPDATES DAC 1
AND DAC 2 TO N + 2
UPDATES DAC 1 AND
DAC 2 TO N - 1
PRELOADS SAMPLE N
FOR DAC 2
PRELOADS SAMPLE
N + 1 FOR DAC 2
PRELOADS SAMPLE
N + 2 FOR DAC 2
INPUT SAMPLE
N + 1
FOR DAC 2
INPUT SAMPLE
N + 2
FOR DAC 2
INPUT SAMPLE N
FOR DAC 1
INPUT SAMPLE
N + 1
FOR DAC 1
INPUT SAMPLE
N + 2
FOR DAC 1
tDH1
tDH2
N - 1
Digital Feedthrough
Digital feedthrough is the noise generated on a DAC’s
output when any digital input transitions. Proper board
layout and grounding will significantly reduce this
noise, but there will always be some feedthrough
caused by the DAC itself.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s N harmonics to the fundamen-
tal itself. This is expressed as:
where V1 is the fundamental amplitude, and V2 through
VN are the amplitudes of the 2nd- through Nth-order
harmonics.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of RMS amplitude of the carrier frequen-
cy (maximum signal component) to the RMS value of the
next largest noise or harmonic distortion component.
SFDR is usually measured in dBc with respect to the car-
rier frequency amplitude or in dBFS with respect to the
DAC’s full-scale range. Depending on its test condition,
SFDR is observed within a predefined window or to
Nyquist. In the case of the MAX5186/MAX5189, the SFDR
performance is measured for a 0dBFS output amplitude
and analyzed within the Nyquist window.
THD
20 log
(V
V
)
V
234
N
1
22
2
++
+
...
AGND
High-Z
AGND
High-Z
MAX5189
MAX5186
Shutdown
X
1
Last state prior to standby mode
Wake-Up
1
0
MAX5189
MAX5186
Standby
0
OUTPUT STATE
POWER-DOWN
MODE
DACEN (DAC
ENABLE)
PD
(POWER-DOWN SELECT)
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