參數(shù)資料
型號: MAX5150BCEE
廠商: Maxim Integrated Products
文件頁數(shù): 5/16頁
文件大?。?/td> 0K
描述: IC DAC DUAL V-OUT 13BIT 16-QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 100
設(shè)置時間: 16µs
位數(shù): 13
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): *
Serial-Data Output
The serial-data output, DOUT, is the internal shift regis-
ter’s output. DOUT allows for daisy chaining of devices
and data readback. The MAX5150/MAX5151 can be
programmed to shift data out of DOUT on SCLK’s
falling edge (Mode 0) or on the rising edge (Mode 1).
Mode 0 provides a lag of 16 clock cycles, which main-
tains compatibility with SPI/QSPI and Microwire inter-
faces. In Mode 1, the output data lags 15.5 clock
cycles. On power-up, the device defaults to Mode 0.
User-Programmable Logic Output (UPO)
UPO allows an external device to be controlled through
the serial interface (Table 1), thereby reducing the
number of microcontroller I/O pins required.
Power-Down Lockout Input (P
PD
DL
L)
The power-down lockout pin (PDL) disables software
shutdown when low. When in shutdown, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to shutdown. PDL can also be
used to asynchronously wake up the device.
Daisy Chaining Devices
Any number of MAX5150/MAX5151s can be daisy
chained by connecting the DOUT pin of one device to
the DIN pin of the following device in the chain (Figure 7).
Since the MAX5150/MAX5151’s DOUT pin has an inter-
nal active pull-up, the DOUT sink/source capability
determines the time required to discharge/charge a
capacitive load. Refer to the serial-data-out VOH and
VOL specifications in the Electrical Characteristics.
Figure 8 shows an alternate method of connecting sev-
eral MAX5150/MAX5151s. In this configuration, the
data bus is common to all devices; data is not shifted
through a daisy chain. More I/O lines are required in
this configuration because a dedicated chip-select
input (CS) is required for each IC.
__________Applications Information
Unipolar Output
Figure 9 shows the MAX5150/MAX5151 configured for
unipolar, rail-to-rail operation with a gain of +2. The
MAX5150 can produce a 0V to 4.096V output with
2.048V reference (Figure 9), while the MAX5151 can
produce a range of 0V to 2.5V with a 1.25V reference.
Table 2 lists the unipolar output codes. An offset to the
output can be achieved by connecting a voltage to
OS_, as shown in Figure 10. By applying VOS_ = -1V,
the output values will range between 1V and (1V +
VREF x 2).
MAX5150/MAX5151
Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface
Table 2. Unipolar Code Table (Gain = +2)
MAX5150
MAX5151
DAC
GAIN = +2
REF_
OUT_
OS_
DGND
AGND
+5V/+3V
VDD
R
Figure 9. Unipolar Output Circuit (Rail-to-Rail)
MAX5150
MAX5151
DAC _
AGND
DGND
REF_
OUT_
OS_
VOS
+5V/+3V
VDD
R
______________________________________________________________________________________
13
ANALOG OUTPUT
11111
1111
10000
0000
0001
DAC CONTENTS
MSB
LSB
10000
0000
01111
1111
00000
0000
0V
00000
0000
0001
+V
8191
8192
REF
x 2
+V
4097
8192
REF
x 2
+V
4096
8192
V
REF
=
x 2
+V
4095
8192
REF
x 2
+V
1
8192
REF
x 2
Figure 10. Setting OS_ for Output Offset
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