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參數(shù)資料
| 型號(hào)： | MAX5139GTE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 17/17頁 |
| 文件大小： | 0K |
| 描述： | IC DAC V-OUT 12BIT 1CH 16-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 5µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | DSP，I²C，MICROWIRE?，并行，QSPI?，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-TQFN（3x3） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | * |
Detailed Description
The MAX5138/MAX5139 are a family of single-channel,
pin-compatible and software-compatible, 16-bit and 12-
bit DACs. The parts are low-power, buffered voltage-
output, high-linearity DACs. The MAX5138/MAX5139
minimize the digital noise feedthrough from input to out-
put by powering down the SCLK and DIN input buffers
after completion of each 24-bit serial input. On power-
up, the MAX5138/MAX5139 reset the DAC output to zero
or midscale, depending on the state of the M/Z input,
providing additional safety for applications that drive
valves or other transducers that need to be off on power-
up. The MAX5138/MAX5139 contain a segmented resis-
tor string-type DAC, a serial-in parallel-out shift register,
a DAC register, power-on reset (POR) circuit, and con-
trol logic. On the falling edge of the clock (SCLK) pulse,
the serial input (DIN) data is shifted into the device, MSB
first. During power-down, an internal 80k
Ω resistor pulls
DAC outputs to AGND.
Output Amplifier (OUT)
The MAX5138/MAX5139 include an internal buffer for the
DAC output. The internal buffer provides improved load
regulation and transition glitch suppression for the DAC
output. The output buffer slews at 1.25V/s and drives up
to 2k
Ω in parallel with 200pF. The analog supply voltage
(AVDD) determines the maximum output voltage range
of the device as AVDD powers the output buffer.
DAC Reference
Internal Reference
The MAX5138/MAX5139 feature an internal reference
with a nominal +2.44V output. Connect REFO to REFI
when using the internal reference. Bypass REFO to
AGND with a 47pF (maximum 100pF) capacitor.
Alternatively, if heavier decoupling is required, add a
1k
Ω resistor in series with a 1F capacitor in parallel
with the existing 100pF capacitor. REFO can deliver up
to 100A of current with no degradation in perfor-
mance. Configure other reference voltages by applying
a resistive potential divider with a total resistance
greater than 33k
Ω from REFO to AGND.
External Reference
The external reference input features a typical input
impedance of 113k
Ω and accepts an input voltage
from +2V to AVDD. Connect an external voltage
supply between REFI and AGND to apply an ex-
ternal reference. Leave REFO unconnected. Visit
www.maximintegrated.com/products/references for
a list of available external voltage-reference devices.
Low-Power, Single, 16-/12-Bit,
Buffered Voltage-Output DACs
Maxim Integrated
9
MAX5138/MAX5139
Pin Description
PIN
NAME
FUNCTION
1, 4, 9
N.C.
No Connection. Not internally connected.
2
M/
Z
Power-Up Reset Select. Connect M/
Z low to AGND to power up the DAC output. Connect M/Z
high to power up the DAC output to midscale.
3
LDAC
Load DAC. Active-low hardware load DAC input.
5
SCLK
Serial-Clock Input
6
CS
Active-Low Chip-Select Input
7
DIN
Data In
8
AGND
Analog Ground. Internally connected to AGND. Connect AGND to AGND externally.
10
READY
Data Output
11
DVDD
Digital Power Supply. Bypass DVDD with a 0.1μF capacitor to AGND.
12
OUT
Buffered DAC Output
13
AVDD
Analog Power Supply. Bypass AVDD with a 0.1μF capacitor to AGND.
14
REFI
Reference Voltage Input. Bypass REFI with a 0.1μF capacitor to AGND.
15
REFO
Reference Voltage Output
16
AGND
DAC Ground. Internally connected to AGND. Connect AGND to AGND externally.
—
EP
Exposed Pad. Not internally connected. Connect EP to AGND or leave unconnected. Not
intended as an electrical connection point.
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