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參數(shù)資料
| 型號： | MAX4370ESA+T |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 432K |
| 描述： | IC CNTRLR HOT-SWAP 8-SOIC |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 熱交換控制器 |
| 應用： | 通用 |
| 內部開關： | 無 |
| 電源電壓： | 2.7 V ~ 13.2 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
Using the MAX4370 on the Backplane
The MAX4370 can be used on the backplane to regu-
late current upon insertion of a removable card. This
allows multiple cards with different input capacitance to
be inserted into the same slot even if the card doesnt
have on-board hot-swap protection.
The MAX4370 current-limiting feature is active during
the start-up period set by CTIM. The start-up period
can be triggered if V
IN
is connected to ON through a
trace on the card. Once t
START
has expired (timed out),
the load capacitance has to be charged or a fault con-
dition is detected. To ensure start-up with a fixed CTIM,
t
START
has to be longer than the time required to
charge the board capacitance. The maximum load
capacitance is calculated as follows:
C
BOARD
< t
START
?SPAN class="pst MAX4370ESA-T_2342621_1"> I
FAST,SET
/ V
IN
Input Transients
The voltage at V
IN
must be above the UVLO during
inrush and fault conditions. When a short condition
occurs on the board, the fault current can be higher
than the fast comparator current limit. The gate voltage
is discharged immediately, but note that the MOSFET is
not completely off until V
GS
< V
TH
. If the main system
power supply collapses below UVLO, the MAX4370 will
force the device to restart once the supply has recov-
ered. The main system power supply must be able to
deliver this fault current without excessive voltage drop.
The MOSFET is turned off in a very short time; there-
fore, the resulting di/dt can be considerable. The back-
plane delivering the power to the external card must
have a fairly low inductance to limit the voltage tran -
sients caused by the removal of a fault.
MOSFET Thermal Considerations
During normal operation, the MOSFET dissipates little
power; it is fully turned on and its R
DS(ON)
is minimal.
The power dissipated in normal operation is P
D
=
(I
LOAD)
2
?SPAN class="pst MAX4370ESA-T_2342621_1"> R
DS(ON)
. A considerable amount of power is
dissipated during the turn-on and turn-off transients.
The design must take into consideration the worst-case
scenario of a continuous short-circuit fault present on
the board. Two cases must be considered:
1) The single turn-on with the device latched after a
fault.
2) An external circuit forces a continuous automatic
retry after the fault.
MOSFET manufacturers typically include the package
normalized transient thermal resistance (r
窲A
(t) or
r
窲C
(t)), which is determined by the start-up time and
the retry duty cycle (d = t
START
/ t
RETRY
). The following
equation is used to calculate the required transient
thermal resistance:
R
窲A
(t) = (T
J,MAX
- T
A
) / P
D,MAX
(t)
where P
DMAX
(t) = V
IN
?SPAN class="pst MAX4370ESA-T_2342621_1"> I
FAULT
and the resulting R
窲A
=
R
窲A
(t) / r
窲A
(t). R
窲A
is the thermal resistance deter-
mined with a continuous load and by the layout or
heatsink.
Layout Considerations
To take full advantage of the switch response time to an
output fault condition, it is important to keep all traces
as short as possible and to maximize the high-current
trace dimensions to reduce the effect of undesirable
parasitic inductance. Place the MAX4370 close to the
cards connector. Use a ground plane to minimize its
impedance and inductance.
Minimize the current-sense resistor trace length
(<10mm), and ensure accurate current sensing with
Kelvin connections (Figure 12).
When the output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence,
the power dissipation across the switch increases, as
does the die temperature. An efficient way to achieve
good power dissipation on a surface-mount package is
to lay out two copper pads directly under the package
on both sides of the board. Connect the two pads to
the ground plane through vias, and use enlarged cop-
per mounting pads on the top side of the board.
Current-Regulating Hot-Swap Controller with
DualSpeed/BiLevel Fault Protection
14 ______________________________________________________________________________________
V
IN
V
IN
ON
BACKPLANE
MAX4370
VSEN GATE
CTIM
C
BOARD
V
OUT
REMOVABLE CARD
WITH NO HOT-INSERTION
PROTECTION
Figure 11. Using the MAX4370 on the Backplane
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