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參數(shù)資料
| 型號： | MAX2463EAI |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | 900MHz Image-Reject Transceivers |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PDSO28 |
| 封裝： | 5.30 MM, MO-150, SSOP-28 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 250K |
| 代理商： | MAX2463EAI |
M
900MHz Image-Reject Transceivers
10
______________________________________________________________________________________
Detailed Description
The following sections describe each of the functional
blocks shown in the
Functional Diagram.
Receiver
The MAX2420/MAX2421/MAX2422/MAX2460/MAX2463
’
s
receive path consists of a 900MHz low-noise amplifier,
an image-reject mixer, and an IF buffer amplifier.
The LNA
’
s gain and biasing are adjustable through the
LNAGAIN pin. Proper operation of this pin can provide
optimum performance over a wide range of signal lev-
els. The LNA can be placed in four modes by applying
a DC voltage on the LNAGAIN pin. See Table 1, as well
as the relevant
Typical Operating Characteristics
plots.
At low LNAGAIN voltages, the LNA is shut off, and the
input signal capacitively couples directly into the mixer
to provide maximum linearity for large-signal operation
(receiver close to transmitter). As the LNAGAIN voltage
is raised, the LNA begins to turn on. Between 0.5V and
1V at LNAGAIN, the LNA is partially biased and
behaves like a Class C amplifier. Avoid this operating
mode for applications where linearity is a concern. As
the LNAGAIN voltage reaches 1V, the LNA is fully
biased into Class A mode, and the gain is monotonical-
ly adjustable at LNAGAIN voltages above 1V. See the
Receiver Gain, Receiver IP3, and Receiver Noise
Figure vs. LNAGAIN plots in the
Typical Operating
Characteristics
for more information.
The downconverter is implemented using an image-
reject mixer consisting of an input buffer with two out-
puts, each of which is fed to a double-balanced mixer.
The local-oscillator (LO) port of each mixer is driven
from a quadrature LO. The LO is generated from an on-
chip oscillator and an external tank circuit. Its signal is
buffered and split into phase shifters, which provide
90
°
of phase shift across their outputs. This pair of LO
signals is fed to the mixers. The mixers
’
outputs are
then passed through a second pair of phase shifters,
which provide a 90
°
phase shift across their outputs. The
resulting mixer outputs are then summed together. The
final phase relationship is such that the desired signal is
reinforced and the image signal is canceled. The down-
converter mixer output appears on the RXOUT pin, a sin-
gle-ended 330
output.
Transmitter
The transmitter operates similarly to the receiver, but
with the phase shifters at the mixer inputs. The transmit-
ter consists of an input buffer amplifier with more than
36dB of gain-adjustment range via the TXGAIN pin.
This buffer
’
s output is split internally into an in-phase (I)
and a quadrature-phase (Q) path. IF phase-shifting net-
works give the Q-channel path a 90
°
phase shift with
respect to the I channel. The I and Q signals are input
to a pair of double-balanced mixers, driven with quad-
rature LO. The mixer outputs are then summed, cancel-
ing the image component. The image-rejected output
signal is fed to the PA predriver, which outputs typically
-3dBm on the TXOUT pin.
Since the transmit and receive sections share an LO
and an IF frequency, interference results if both sec-
tions are active at the same time.
Phase Shifters
MAX2420/MAX2421/MAX2422/MAX2460/MAX2463
devices use passive networks to provide quadrature
phase shifting for the receive IF, transmit IF, and LO
signals. Because these networks are frequency selec-
tive, proper part selection is important. Image rejection
degrades as the IF and RF move away from the
designed optimum frequencies. The MAX2420/
MAX2421/MAX2422
’
s phase shifters are arranged such
that the LO frequency is higher than the RF carrier fre-
quency (high-side injection), while the MAX2460/
MAX2463
’
s phase shifters are arranged such that the
LO frequency is lower than the RF carrier frequency
(low-side injection). Refer to the
Selector Guide
.
Local Oscillator (LO)
The on-chip LO is formed by an emitter-coupled differ-
ential pair. An external LC resonant tank sets the oscil-
lation frequency. A varactor diode is typically used to
create a voltage-controlled oscillator (VCO). See the
Applications Information
section for an example VCO
tank circuit.
The LO may be overdriven in applications where an
external signal is available. The external LO signal
should be about 0dBm from 50
, and should be AC
coupled into either the TANK or
TANK
pin. Both TANK
and
TANK
require pull-up resistors to V
CC
. See the
Applications Information
section for details.
LNA partially biased.
Avoid this mode
—
the LNA operates in a Class C manner
LNA capacitively bypassed, minimum
gain, maximum IP3
MODE
LNA at maximum gain (remains monotonic)
LNA gain is monotonically adjustable
1.5 < V
≤
V
CC
1.0 < V
≤
1.5
0.5 < V < 1.0
0 < V
≤
0.5
LNAGAIN
VOLTAGE (V)
Table 1. LNA Modes
相關(guān)PDF資料 |
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| MAX2422EAI | Hex Buffers/Drivers With Open-Collector High-Voltage Outputs 14-SO 0 to 70 |
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| MAX2463EAI+ | 功能描述:射頻收發(fā)器 Integrated Circuits (ICs) RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| MAX2463EAI+T | 功能描述:射頻收發(fā)器 Integrated Circuits (ICs) RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| MAX2463EAI-T | 功能描述:射頻收發(fā)器 RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
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