參數(shù)資料
型號(hào): MAX2079CXE+T
廠商: Maxim Integrated Products
文件頁數(shù): 11/49頁
文件大?。?/td> 0K
描述: IC OCT ULTRASOUND RCVR 144CTBGA
標(biāo)準(zhǔn)包裝: 1,000
系列: *
Low-Power, High-Performance, Fully Integrated
Octal Ultrasound Receiver (Octal LNA, VGA,
AAF, ADC, and CWD Beamformer)
MAX2079
19
Maxim Integrated
Bump Description (continued)
BUMP
NAMe
FUNCTION
C11
OUT2+
Channel 2 Positive LVDS Output
C12
OUT2-
Channel 2 Negative LVDS Output
D1
IN3
Channel 3 Input. Connect to a 4.7nF coupling capacitor.
D2
ZF3
Channel 3 Active Impedance Matching Line. AC-couple to IN3 with a 2.2nF capacitor.
D11
OUT3+
Channel 3 Positive LVDS Output
D12
OUT3-
Channel 3 Negative LVDS Output
E1
ZF4
Channel 4 Active Impedance Matching Line. AC-couple to IN4 with a 2.2nF capacitor.
E2
INC3
Channel 3 Clamp Input. Connect to the source side of the coupling capacitor.
E11
OUT4+
Channel 4 Positive LVDS Output
E12
OUT4-
Channel 4 Negative LVDS Output
F1
INC4
Channel 4 Clamp Input. Connect to the source side of the coupling capacitor.
F2
IN4
Channel 4 Input. Connect to a 4.7nF coupling capacitor.
F11
CLKOUT+ Positive LVDS Serial-Clock Output
F12
CLKOUT- Negative LVDS Serial-Clock Output
G1
IN5
Channel 5 Input. Connect to a 4.7nF coupling capacitor.
G2
ZF5
Channel 5 Active Impedance Matching Line. AC-couple to IN5 with a 2.2nF capacitor.
G3, F3
AG
Analog Ground for LNA Inputs. Connect to a 47nF AC-coupling capacitor to ground.
G11
FRAME+
Positive Frame-Alignment LVDS Output
G12
FRAME-
Negative Frame-Alignment LVDS Output
H1
ZF6
Channel 6 Active Impedance Matching Line. AC-couple to IN6 with a 2.2nF capacitor.
H2
INC5
Channel 5 Clamp Input. Connect to the source side of the coupling capacitor.
H11
OUT5+
Channel 5 Positive LVDS Output
H12
OUT5-
Channel 5 Negative LVDS Output
J1
INC6
Channel 6 Clamp Input. Connect to the source side of the coupling capacitor.
J2
IN6
Channel 6 Input. Connect to a 4.7nF coupling capacitor.
J11
OUT6+
Channel 6 Positive LVDS Output
J12
OUT6-
Channel 6 Negative LVDS Output
K1
IN7
Channel 7 Input. Connect to a 4.7nF coupling capacitor.
K2
ZF7
Channel 7 Active Impedance Matching Line. AC-couple to IN7 with a 2.2nF capacitor.
K11
OUT7+
Channel 7 Positive LVDS Output
K12
OUT7-
Channel 7 Negative LVDS Output
L1
ZF8
Channel 8 Active Impedance Matching Line. AC-couple to IN8 with a 2.2nF capacitor.
L2
INC7
Channel 7 Clamp Input. Connect to the source side of the coupling capacitor.
L4
VREF
Voltage Reference
L5
GC-
Negative Gain Control Voltage. Set VGC+ - VGC- = +3V for maximum gain. Set VGC+ - VGC- =
-3V for minimum gain.
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